4 * Copyright 2004 Develer S.r.l. (http://www.develer.com/)
5 * Copyright 2004 Giovanni Bajo
6 * This file is part of DevLib - See devlib/README for information.
9 * \brief CPU-specific definitions
13 * \author Giovanni Bajo <rasky@develer.com>
14 * \author Bernardo Innocenti <bernie@develer.com>
15 * \author Stefano Fedrigo <aleph@develer.com>
20 * Revision 1.14 2004/08/24 13:29:28 bernie
21 * Trim CVS log; Rename header guards.
23 * Revision 1.12 2004/08/14 19:37:57 rasky
24 * Merge da SC: macros.h, pool.h, BIT_CHANGE, nome dei processi, etc.
26 * Revision 1.11 2004/08/05 17:39:56 bernie
29 * Revision 1.10 2004/08/02 20:20:29 aleph
30 * Merge from project_ks
32 * Revision 1.9 2004/07/30 14:24:16 rasky
33 * Task switching con salvataggio perfetto stato di interrupt (SR)
34 * Kernel monitor per dump informazioni su stack dei processi
39 #include "compiler.h" /* for uintXX_t, PP_CAT3(), PP_STRINGIZE() */
42 // Macros for determining CPU endianness
43 #define CPU_BIG_ENDIAN 0x1234
44 #define CPU_LITTLE_ENDIAN 0x3412
46 // Macros to include cpu-specific version of the headers
47 #define CPU_HEADER(module) PP_STRINGIZE(PP_CAT3(module, _, CPU_ID).h)
52 #define DISABLE_INTS disable_interrupt()
53 #define ENABLE_INTS enable_interrupt()
54 #define NOP nop_instruction()
56 typedef uint16_t cpuflags_t; // FIXME
57 typedef unsigned int cpustack_t;
59 #define CPU_REG_BITS 16
60 #define CPU_REGS_CNT 16
61 #define CPU_STACK_GROWS_UPWARD 0
62 #define CPU_SP_ON_EMPTY_SLOT 0
63 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
67 #define NOP asm volatile ("nop")
68 #define DISABLE_INTS /* nothing */
69 #define ENABLE_INTS /* nothing */
71 typedef uint32_t cpuflags_t; // FIXME
72 typedef uint32_t cpustack_t;
74 #define CPU_REG_BITS 32
75 #define CPU_REGS_CNT 7
76 #define CPU_STACK_GROWS_UPWARD 0
77 #define CPU_SP_ON_EMPTY_SLOT 0
78 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
83 #define DISABLE_INTS do { asm(bfset #0x0200,SR); asm(nop); } while (0)
84 #define ENABLE_INTS do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
86 #define DISABLE_IRQSAVE(x) \
87 do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
88 #define ENABLE_IRQRESTORE(x) \
89 do { (void)x; asm(move x,SR); } while (0)
91 typedef uint16_t cpuflags_t;
92 typedef unsigned int cpustack_t;
94 #define CPU_REG_BITS 16
95 #define CPU_REGS_CNT FIXME
96 #define CPU_SAVED_REGS_CNT 8
97 #define CPU_STACK_GROWS_UPWARD 1
98 #define CPU_SP_ON_EMPTY_SLOT 0
99 #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
101 /* Memory is word-addessed in the DSP56K */
102 #define BITSP_PER_CHAR 16
103 #define SIZEOF_SHORT 1
105 #define SIZEOF_LONG 2
110 #define NOP asm volatile ("nop" ::)
111 #define DISABLE_INTS asm volatile ("cli" ::)
112 #define ENABLE_INTS asm volatile ("sei" ::)
114 #define DISABLE_IRQSAVE(x) \
116 __asm__ __volatile__( \
117 "in %0,__SREG__\n\t" \
119 : "=r" (x) : /* no inputs */ : "cc" \
123 #define ENABLE_IRQRESTORE(x) \
125 __asm__ __volatile__( \
126 "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
130 typedef uint8_t cpuflags_t;
131 typedef uint8_t cpustack_t;
133 /* Register counts include SREG too */
134 #define CPU_REG_BITS 8
135 #define CPU_REGS_CNT 33
136 #define CPU_SAVED_REGS_CNT 19
137 #define CPU_STACK_GROWS_UPWARD 0
138 #define CPU_SP_ON_EMPTY_SLOT 1
139 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
142 * Initialization value for registers in stack frame.
143 * The register index is not directly corrispondent to CPU
144 * register numbers. Index 0 is the SREG register: the initial
145 * value is all 0 but the interrupt bit (bit 7).
147 #define CPU_REG_INIT_VALUE(reg) (reg == 0 ? 0x80 : 0)
152 //! Default for macro not defined in the right arch section
153 #ifndef CPU_REG_INIT_VALUE
154 #define CPU_REG_INIT_VALUE(reg) 0
158 #ifndef CPU_STACK_GROWS_UPWARD
159 #error CPU_STACK_GROWS_UPWARD should have been defined to either 0 or 1
162 #ifndef CPU_SP_ON_EMPTY_SLOT
163 #error CPU_SP_ON_EMPTY_SLOT should have been defined to either 0 or 1
167 * Support stack handling peculiarities of a few CPUs.
169 * Most processors let their stack grow downward and
170 * keep SP pointing at the last pushed value.
172 #if !CPU_STACK_GROWS_UPWARD
173 #if !CPU_SP_ON_EMPTY_SLOT
174 /* Most microprocessors (x86, m68k...) */
175 #define CPU_PUSH_WORD(sp, data) \
176 do { *--(sp) = (data); } while (0)
177 #define CPU_POP_WORD(sp) \
181 #define CPU_PUSH_WORD(sp, data) \
182 do { *(sp)-- = (data); } while (0)
183 #define CPU_POP_WORD(sp) \
187 #else /* CPU_STACK_GROWS_UPWARD */
189 #if !CPU_SP_ON_EMPTY_SLOT
190 /* DSP56K and other weirdos */
191 #define CPU_PUSH_WORD(sp, data) \
192 do { *++(sp) = (cpustack_t)(data); } while (0)
193 #define CPU_POP_WORD(sp) \
196 #error I bet you cannot find a CPU like this
202 /* DSP56k pushes both PC and SR to the stack in the JSR instruction, but
203 * RTS discards SR while returning (it does not restore it). So we push
204 * 0 to fake the same context.
206 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
208 CPU_PUSH_WORD((sp), (func)); \
209 CPU_PUSH_WORD((sp), 0x100); \
213 /* In AVR, the addresses are pushed into the stack as little-endian, while
214 * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
215 * no natural endianess).
217 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
219 uint16_t funcaddr = (uint16_t)(func); \
220 CPU_PUSH_WORD((sp), funcaddr); \
221 CPU_PUSH_WORD((sp), funcaddr>>8); \
225 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
226 CPU_PUSH_WORD((sp), (func))
231 * \def SIZEOF_CHAR SIZEOF_SHORT SIZEOF_INT SIZEOF_LONG SIZEOF_PTR
232 * \def BITS_PER_CHAR BITS_PER_SHORT BITS_PER_INT BITS_PER_LONG BITS_PER_PTR
234 * \brief Default type sizes
236 * These defaults are reasonable for most 16/32bit machines.
237 * Some of these macros may be overridden by CPU-specific code above.
239 * ANSI C specifies that the following equations must be true:
241 * sizeof(char) <= sizeof(short) <= sizeof(int) <= sizeof(long)
242 * sizeof(float) <= sizeof(double)
244 * BITS_PER_SHORT >= 8
246 * BITS_PER_LONG >= 32
251 #define SIZEOF_CHAR 1
255 #define SIZEOF_SHORT 2
259 #if CPU_REG_BITS < 32
264 #endif /* !SIZEOF_INT */
267 #define SIZEOF_LONG 4
271 #define SIZEOF_PTR SIZEOF_INT
274 #ifndef BITS_PER_CHAR
275 #define BITS_PER_CHAR (SIZEOF_CHAR * 8)
278 #ifndef BITS_PER_SHORT
279 #define BITS_PER_SHORT (SIZEOF_SHORT * BITS_PER_CHAR)
283 #define BITS_PER_INT (SIZEOF_INT * BITS_PER_CHAR)
286 #ifndef BITS_PER_LONG
287 #define BITS_PER_LONG (SIZEOF_LONG * BITS_PER_CHAR)
291 #define BITS_PER_PTR (SIZEOF_PTR * BITS_PER_CHAR)
297 * \def SCHEDULER_IDLE
299 * \brief Invoked by the scheduler to stop the CPU when idle.
301 * This hook can be redefined to put the CPU in low-power mode, or to
302 * profile system load with an external strobe, or to save CPU cycles
303 * in hosted environments such as emulators.
305 #ifndef SCHEDULER_IDLE
306 #if defined(ARCH_EMUL) && (ARCH & ARCH_EMUL)
307 /* This emulator hook should yield the CPU to the host. */
309 void SchedulerIdle(void);
311 #define SCHEDULER_IDLE SchedulerIdle()
312 #else /* !ARCH_EMUL */
313 #define SCHEDULER_IDLE do { /* nothing */ } while (0)
314 #endif /* !ARCH_EMUL */
315 #endif /* !SCHEDULER_IDLE */
317 #endif /* DEVLIB_CPU_H */