4 * Copyright 2004 Develer S.r.l. (http://www.develer.com/)
5 * Copyright 2004 Giovanni Bajo
6 * This file is part of DevLib - See devlib/README for information.
9 * \brief CPU-specific definitions
13 * \author Giovanni Bajo <rasky@develer.com>
14 * \author Bernardo Innocenti <bernie@develer.com>
15 * \author Stefano Fedrigo <aleph@develer.com>
20 *#* Revision 1.24 2004/12/08 08:04:13 bernie
23 *#* Revision 1.23 2004/11/16 22:41:58 bernie
24 *#* Support 64bit CPUs.
26 *#* Revision 1.22 2004/11/16 21:57:59 bernie
27 *#* CPU_IDLE: Rename from SCHEDULER_IDLE.
29 *#* Revision 1.21 2004/11/16 21:34:25 bernie
30 *#* Commonize obsolete names for IRQ macros; Doxygen fixes.
32 *#* Revision 1.20 2004/11/16 20:33:32 bernie
33 *#* CPU_HARVARD: New macro.
35 *#* Revision 1.19 2004/10/03 20:43:54 bernie
36 *#* Fix Doxygen markup.
38 *#* Revision 1.18 2004/10/03 18:36:31 bernie
39 *#* IRQ_GETSTATE(): New macro; Rename IRQ macros for consistency.
41 *#* Revision 1.17 2004/09/06 21:48:27 bernie
42 *#* ATOMIC(): New macro.
44 *#* Revision 1.16 2004/08/29 21:58:33 bernie
45 *#* Rename BITS_PER_XYZ macros; Add sanity checks.
47 *#* Revision 1.15 2004/08/25 14:12:08 rasky
48 *#* Aggiornato il comment block dei log RCS
50 *#* Revision 1.14 2004/08/24 13:29:28 bernie
51 *#* Trim CVS log; Rename header guards.
53 *#* Revision 1.12 2004/08/14 19:37:57 rasky
54 *#* Merge da SC: macros.h, pool.h, BIT_CHANGE, nome dei processi, etc.
56 *#* Revision 1.11 2004/08/05 17:39:56 bernie
57 *#* Fix a Doxygen tag.
59 *#* Revision 1.10 2004/08/02 20:20:29 aleph
60 *#* Merge from project_ks
62 *#* Revision 1.9 2004/07/30 14:24:16 rasky
63 *#* Task switching con salvataggio perfetto stato di interrupt (SR)
64 *#* Kernel monitor per dump informazioni su stack dei processi
69 #include "compiler.h" /* for uintXX_t, PP_CAT3(), PP_STRINGIZE() */
73 * \name Macros for determining CPU endianness.
76 #define CPU_BIG_ENDIAN 0x1234
77 #define CPU_LITTLE_ENDIAN 0x3412
80 /*! Macro to include cpu-specific versions of the headers. */
81 #define CPU_HEADER(module) PP_STRINGIZE(PP_CAT3(module, _, CPU_ID).h)
86 #define NOP nop_instruction()
87 #define IRQ_DISABLE disable_interrupt()
88 #define IRQ_ENABLE enable_interrupt()
90 typedef uint16_t cpuflags_t; // FIXME
91 typedef unsigned int cpustack_t;
93 #define CPU_REG_BITS 16
94 #define CPU_REGS_CNT 16
95 #define CPU_STACK_GROWS_UPWARD 0
96 #define CPU_SP_ON_EMPTY_SLOT 0
97 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
102 #define NOP asm volatile ("nop")
103 #define IRQ_DISABLE /* nothing */
104 #define IRQ_ENABLE /* nothing */
106 typedef uint32_t cpuflags_t; // FIXME
107 typedef uint32_t cpustack_t;
109 #define CPU_REG_BITS 32
110 #define CPU_REGS_CNT 7
111 #define CPU_STACK_GROWS_UPWARD 0
112 #define CPU_SP_ON_EMPTY_SLOT 0
113 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
114 #define CPU_HARVARD 0
119 #define IRQ_DISABLE do { asm(bfset #0x0200,SR); asm(nop); } while (0)
120 #define IRQ_ENABLE do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
122 #define IRQ_SAVE_DISABLE(x) \
123 do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
124 #define IRQ_RESTORE(x) \
125 do { (void)x; asm(move x,SR); } while (0)
128 typedef uint16_t cpuflags_t;
129 typedef unsigned int cpustack_t;
131 #define CPU_REG_BITS 16
132 #define CPU_REGS_CNT FIXME
133 #define CPU_SAVED_REGS_CNT 8
134 #define CPU_STACK_GROWS_UPWARD 1
135 #define CPU_SP_ON_EMPTY_SLOT 0
136 #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
138 /* Memory is word-addessed in the DSP56K */
139 #define CPU_BITS_PER_CHAR 16
140 #define SIZEOF_SHORT 1
142 #define SIZEOF_LONG 2
147 #define NOP asm volatile ("nop" ::)
148 #define IRQ_DISABLE asm volatile ("cli" ::)
149 #define IRQ_ENABLE asm volatile ("sei" ::)
151 #define IRQ_SAVE_DISABLE(x) \
153 __asm__ __volatile__( \
154 "in %0,__SREG__\n\t" \
156 : "=r" (x) : /* no inputs */ : "cc" \
160 #define IRQ_RESTORE(x) \
162 __asm__ __volatile__( \
163 "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
167 #define IRQ_GETSTATE() \
170 __asm__ __volatile__( \
171 "in %0,__SREG__\n\t" \
172 : "=r" (sreg) /* no inputs & no clobbers */ \
174 (bool)(sreg & 0x80); \
177 typedef uint8_t cpuflags_t;
178 typedef uint8_t cpustack_t;
180 /* Register counts include SREG too */
181 #define CPU_REG_BITS 8
182 #define CPU_REGS_CNT 33
183 #define CPU_SAVED_REGS_CNT 19
184 #define CPU_STACK_GROWS_UPWARD 0
185 #define CPU_SP_ON_EMPTY_SLOT 1
186 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
189 * Initialization value for registers in stack frame.
190 * The register index is not directly corrispondent to CPU
191 * register numbers. Index 0 is the SREG register: the initial
192 * value is all 0 but the interrupt bit (bit 7).
194 #define CPU_REG_INIT_VALUE(reg) (reg == 0 ? 0x80 : 0)
199 #define DISABLE_INTS IRQ_DISABLE
200 #define ENABLE_INTS IRQ_ENABLE
201 #define DISABLE_IRQSAVE(x) IRQ_SAVE_DISABLE(x)
202 #define ENABLE_IRQRESTORE(x) IRQ_RESTORE(x)
205 * Execute \a CODE atomically with respect to interrupts.
207 * \see ENABLE_IRQSAVE DISABLE_IRQRESTORE
209 #define ATOMIC(CODE) \
211 cpuflags_t __flags; \
212 DISABLE_IRQSAVE(__flags); \
214 ENABLE_IRQRESTORE(__flags); \
218 //! Default for macro not defined in the right arch section
219 #ifndef CPU_REG_INIT_VALUE
220 #define CPU_REG_INIT_VALUE(reg) 0
224 #ifndef CPU_STACK_GROWS_UPWARD
225 #error CPU_STACK_GROWS_UPWARD should have been defined to either 0 or 1
228 #ifndef CPU_SP_ON_EMPTY_SLOT
229 #error CPU_SP_ON_EMPTY_SLOT should have been defined to either 0 or 1
233 * Support stack handling peculiarities of a few CPUs.
235 * Most processors let their stack grow downward and
236 * keep SP pointing at the last pushed value.
238 #if !CPU_STACK_GROWS_UPWARD
239 #if !CPU_SP_ON_EMPTY_SLOT
240 /* Most microprocessors (x86, m68k...) */
241 #define CPU_PUSH_WORD(sp, data) \
242 do { *--(sp) = (data); } while (0)
243 #define CPU_POP_WORD(sp) \
247 #define CPU_PUSH_WORD(sp, data) \
248 do { *(sp)-- = (data); } while (0)
249 #define CPU_POP_WORD(sp) \
253 #else /* CPU_STACK_GROWS_UPWARD */
255 #if !CPU_SP_ON_EMPTY_SLOT
256 /* DSP56K and other weirdos */
257 #define CPU_PUSH_WORD(sp, data) \
258 do { *++(sp) = (cpustack_t)(data); } while (0)
259 #define CPU_POP_WORD(sp) \
262 #error I bet you cannot find a CPU like this
269 * DSP56k pushes both PC and SR to the stack in the JSR instruction, but
270 * RTS discards SR while returning (it does not restore it). So we push
271 * 0 to fake the same context.
273 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
275 CPU_PUSH_WORD((sp), (func)); \
276 CPU_PUSH_WORD((sp), 0x100); \
281 * In AVR, the addresses are pushed into the stack as little-endian, while
282 * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
283 * no natural endianess).
285 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
287 uint16_t funcaddr = (uint16_t)(func); \
288 CPU_PUSH_WORD((sp), funcaddr); \
289 CPU_PUSH_WORD((sp), funcaddr>>8); \
293 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
294 CPU_PUSH_WORD((sp), (func))
299 * \name Default type sizes.
301 * These defaults are reasonable for most 16/32bit machines.
302 * Some of these macros may be overridden by CPU-specific code above.
304 * ANSI C requires that the following equations be true:
306 * sizeof(char) <= sizeof(short) <= sizeof(int) <= sizeof(long)
307 * sizeof(float) <= sizeof(double)
308 * CPU_BITS_PER_CHAR >= 8
309 * CPU_BITS_PER_SHORT >= 8
310 * CPU_BITS_PER_INT >= 16
311 * CPU_BITS_PER_LONG >= 32
316 #define SIZEOF_CHAR 1
320 #define SIZEOF_SHORT 2
324 #if CPU_REG_BITS < 32
329 #endif /* !SIZEOF_INT */
332 #if CPU_REG_BITS > 32
333 #define SIZEOF_LONG 8
335 #define SIZEOF_LONG 4
340 #define SIZEOF_PTR SIZEOF_INT
343 #ifndef CPU_BITS_PER_CHAR
344 #define CPU_BITS_PER_CHAR (SIZEOF_CHAR * 8)
347 #ifndef CPU_BITS_PER_SHORT
348 #define CPU_BITS_PER_SHORT (SIZEOF_SHORT * CPU_BITS_PER_CHAR)
351 #ifndef CPU_BITS_PER_INT
352 #define CPU_BITS_PER_INT (SIZEOF_INT * CPU_BITS_PER_CHAR)
355 #ifndef CPU_BITS_PER_LONG
356 #define CPU_BITS_PER_LONG (SIZEOF_LONG * CPU_BITS_PER_CHAR)
359 #ifndef CPU_BITS_PER_PTR
360 #define CPU_BITS_PER_PTR (SIZEOF_PTR * CPU_BITS_PER_CHAR)
364 /* Sanity checks for the above definitions */
365 STATIC_ASSERT(sizeof(char) == SIZEOF_CHAR);
366 STATIC_ASSERT(sizeof(short) == SIZEOF_SHORT);
367 STATIC_ASSERT(sizeof(long) == SIZEOF_LONG);
368 STATIC_ASSERT(sizeof(int) == SIZEOF_INT);
372 * \def SCHEDULER_IDLE
374 * \brief Invoked by the scheduler to stop the CPU when idle.
376 * This hook can be redefined to put the CPU in low-power mode, or to
377 * profile system load with an external strobe, or to save CPU cycles
378 * in hosted environments such as emulators.
381 #if defined(ARCH_EMUL) && (ARCH & ARCH_EMUL)
382 /* This emulator hook should yield the CPU to the host. */
384 void SchedulerIdle(void);
386 #define CPU_IDLE SchedulerIdle()
387 #else /* !ARCH_EMUL */
388 #define CPU_IDLE do { /* nothing */ } while (0)
389 #endif /* !ARCH_EMUL */
390 #endif /* !CPU_IDLE */
393 #define SCHEDULER_IDLE CPU_IDLE
395 #endif /* DEVLIB_CPU_H */