4 * Copyright 2004 Develer S.r.l. (http://www.develer.com/)
5 * Copyright 2004 Giovanni Bajo
6 * This file is part of DevLib - See devlib/README for information.
9 * \brief CPU-specific definitions
13 * \author Giovanni Bajo <rasky@develer.com>
14 * \author Bernardo Innocenti <bernie@develer.com>
15 * \author Stefano Fedrigo <aleph@develer.com>
20 *#* Revision 1.26 2004/12/13 12:08:12 bernie
21 *#* DISABLE_IRQSAVE, ENABLE_IRQRESTORE, DISABLE_INTS, ENABLE_INTS: Remove obsolete macros.
23 *#* Revision 1.25 2004/12/08 08:31:02 bernie
24 *#* CPU_HARVARD: Define to 1 for AVR and DSP56K.
26 *#* Revision 1.24 2004/12/08 08:04:13 bernie
29 *#* Revision 1.23 2004/11/16 22:41:58 bernie
30 *#* Support 64bit CPUs.
32 *#* Revision 1.22 2004/11/16 21:57:59 bernie
33 *#* CPU_IDLE: Rename from SCHEDULER_IDLE.
35 *#* Revision 1.21 2004/11/16 21:34:25 bernie
36 *#* Commonize obsolete names for IRQ macros; Doxygen fixes.
38 *#* Revision 1.20 2004/11/16 20:33:32 bernie
39 *#* CPU_HARVARD: New macro.
41 *#* Revision 1.19 2004/10/03 20:43:54 bernie
42 *#* Fix Doxygen markup.
44 *#* Revision 1.18 2004/10/03 18:36:31 bernie
45 *#* IRQ_GETSTATE(): New macro; Rename IRQ macros for consistency.
47 *#* Revision 1.17 2004/09/06 21:48:27 bernie
48 *#* ATOMIC(): New macro.
50 *#* Revision 1.16 2004/08/29 21:58:33 bernie
51 *#* Rename BITS_PER_XYZ macros; Add sanity checks.
53 *#* Revision 1.15 2004/08/25 14:12:08 rasky
54 *#* Aggiornato il comment block dei log RCS
56 *#* Revision 1.14 2004/08/24 13:29:28 bernie
57 *#* Trim CVS log; Rename header guards.
59 *#* Revision 1.12 2004/08/14 19:37:57 rasky
60 *#* Merge da SC: macros.h, pool.h, BIT_CHANGE, nome dei processi, etc.
62 *#* Revision 1.11 2004/08/05 17:39:56 bernie
63 *#* Fix a Doxygen tag.
65 *#* Revision 1.10 2004/08/02 20:20:29 aleph
66 *#* Merge from project_ks
68 *#* Revision 1.9 2004/07/30 14:24:16 rasky
69 *#* Task switching con salvataggio perfetto stato di interrupt (SR)
70 *#* Kernel monitor per dump informazioni su stack dei processi
75 #include "compiler.h" /* for uintXX_t, PP_CAT3(), PP_STRINGIZE() */
79 * \name Macros for determining CPU endianness.
82 #define CPU_BIG_ENDIAN 0x1234
83 #define CPU_LITTLE_ENDIAN 0x3412
86 /*! Macro to include cpu-specific versions of the headers. */
87 #define CPU_HEADER(module) PP_STRINGIZE(PP_CAT3(module, _, CPU_ID).h)
92 #define NOP nop_instruction()
93 #define IRQ_DISABLE disable_interrupt()
94 #define IRQ_ENABLE enable_interrupt()
96 typedef uint16_t cpuflags_t; // FIXME
97 typedef unsigned int cpustack_t;
99 #define CPU_REG_BITS 16
100 #define CPU_REGS_CNT 16
101 #define CPU_STACK_GROWS_UPWARD 0
102 #define CPU_SP_ON_EMPTY_SLOT 0
103 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
104 #define CPU_HARVARD 0
108 #define NOP asm volatile ("nop")
109 #define IRQ_DISABLE /* nothing */
110 #define IRQ_ENABLE /* nothing */
112 typedef uint32_t cpuflags_t; // FIXME
113 typedef uint32_t cpustack_t;
115 #define CPU_REG_BITS 32
116 #define CPU_REGS_CNT 7
117 #define CPU_STACK_GROWS_UPWARD 0
118 #define CPU_SP_ON_EMPTY_SLOT 0
119 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
120 #define CPU_HARVARD 0
125 #define IRQ_DISABLE do { asm(bfset #0x0200,SR); asm(nop); } while (0)
126 #define IRQ_ENABLE do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
128 #define IRQ_SAVE_DISABLE(x) \
129 do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
130 #define IRQ_RESTORE(x) \
131 do { (void)x; asm(move x,SR); } while (0)
134 typedef uint16_t cpuflags_t;
135 typedef unsigned int cpustack_t;
137 #define CPU_REG_BITS 16
138 #define CPU_REGS_CNT FIXME
139 #define CPU_SAVED_REGS_CNT 8
140 #define CPU_STACK_GROWS_UPWARD 1
141 #define CPU_SP_ON_EMPTY_SLOT 0
142 #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
143 #define CPU_HARVARD 1
145 /* Memory is word-addessed in the DSP56K */
146 #define CPU_BITS_PER_CHAR 16
147 #define SIZEOF_SHORT 1
149 #define SIZEOF_LONG 2
154 #define NOP asm volatile ("nop" ::)
155 #define IRQ_DISABLE asm volatile ("cli" ::)
156 #define IRQ_ENABLE asm volatile ("sei" ::)
158 #define IRQ_SAVE_DISABLE(x) \
160 __asm__ __volatile__( \
161 "in %0,__SREG__\n\t" \
163 : "=r" (x) : /* no inputs */ : "cc" \
167 #define IRQ_RESTORE(x) \
169 __asm__ __volatile__( \
170 "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
174 #define IRQ_GETSTATE() \
177 __asm__ __volatile__( \
178 "in %0,__SREG__\n\t" \
179 : "=r" (sreg) /* no inputs & no clobbers */ \
181 (bool)(sreg & 0x80); \
184 typedef uint8_t cpuflags_t;
185 typedef uint8_t cpustack_t;
187 /* Register counts include SREG too */
188 #define CPU_REG_BITS 8
189 #define CPU_REGS_CNT 33
190 #define CPU_SAVED_REGS_CNT 19
191 #define CPU_STACK_GROWS_UPWARD 0
192 #define CPU_SP_ON_EMPTY_SLOT 1
193 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
194 #define CPU_HARVARD 1
197 * Initialization value for registers in stack frame.
198 * The register index is not directly corrispondent to CPU
199 * register numbers. Index 0 is the SREG register: the initial
200 * value is all 0 but the interrupt bit (bit 7).
202 #define CPU_REG_INIT_VALUE(reg) (reg == 0 ? 0x80 : 0)
207 * Execute \a CODE atomically with respect to interrupts.
209 * \see IRQ_SAVE_DISABLE IRQ_RESTORE
211 #define ATOMIC(CODE) \
213 cpuflags_t __flags; \
214 IRQ_SAVE_DISABLE(__flags); \
216 IRQ_RESTORE(__flags); \
220 //! Default for macro not defined in the right arch section
221 #ifndef CPU_REG_INIT_VALUE
222 #define CPU_REG_INIT_VALUE(reg) 0
226 #ifndef CPU_STACK_GROWS_UPWARD
227 #error CPU_STACK_GROWS_UPWARD should have been defined to either 0 or 1
230 #ifndef CPU_SP_ON_EMPTY_SLOT
231 #error CPU_SP_ON_EMPTY_SLOT should have been defined to either 0 or 1
235 * Support stack handling peculiarities of a few CPUs.
237 * Most processors let their stack grow downward and
238 * keep SP pointing at the last pushed value.
240 #if !CPU_STACK_GROWS_UPWARD
241 #if !CPU_SP_ON_EMPTY_SLOT
242 /* Most microprocessors (x86, m68k...) */
243 #define CPU_PUSH_WORD(sp, data) \
244 do { *--(sp) = (data); } while (0)
245 #define CPU_POP_WORD(sp) \
249 #define CPU_PUSH_WORD(sp, data) \
250 do { *(sp)-- = (data); } while (0)
251 #define CPU_POP_WORD(sp) \
255 #else /* CPU_STACK_GROWS_UPWARD */
257 #if !CPU_SP_ON_EMPTY_SLOT
258 /* DSP56K and other weirdos */
259 #define CPU_PUSH_WORD(sp, data) \
260 do { *++(sp) = (cpustack_t)(data); } while (0)
261 #define CPU_POP_WORD(sp) \
264 #error I bet you cannot find a CPU like this
271 * DSP56k pushes both PC and SR to the stack in the JSR instruction, but
272 * RTS discards SR while returning (it does not restore it). So we push
273 * 0 to fake the same context.
275 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
277 CPU_PUSH_WORD((sp), (func)); \
278 CPU_PUSH_WORD((sp), 0x100); \
283 * In AVR, the addresses are pushed into the stack as little-endian, while
284 * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
285 * no natural endianess).
287 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
289 uint16_t funcaddr = (uint16_t)(func); \
290 CPU_PUSH_WORD((sp), funcaddr); \
291 CPU_PUSH_WORD((sp), funcaddr>>8); \
295 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
296 CPU_PUSH_WORD((sp), (func))
301 * \name Default type sizes.
303 * These defaults are reasonable for most 16/32bit machines.
304 * Some of these macros may be overridden by CPU-specific code above.
306 * ANSI C requires that the following equations be true:
308 * sizeof(char) <= sizeof(short) <= sizeof(int) <= sizeof(long)
309 * sizeof(float) <= sizeof(double)
310 * CPU_BITS_PER_CHAR >= 8
311 * CPU_BITS_PER_SHORT >= 8
312 * CPU_BITS_PER_INT >= 16
313 * CPU_BITS_PER_LONG >= 32
318 #define SIZEOF_CHAR 1
322 #define SIZEOF_SHORT 2
326 #if CPU_REG_BITS < 32
331 #endif /* !SIZEOF_INT */
334 #if CPU_REG_BITS > 32
335 #define SIZEOF_LONG 8
337 #define SIZEOF_LONG 4
342 #define SIZEOF_PTR SIZEOF_INT
345 #ifndef CPU_BITS_PER_CHAR
346 #define CPU_BITS_PER_CHAR (SIZEOF_CHAR * 8)
349 #ifndef CPU_BITS_PER_SHORT
350 #define CPU_BITS_PER_SHORT (SIZEOF_SHORT * CPU_BITS_PER_CHAR)
353 #ifndef CPU_BITS_PER_INT
354 #define CPU_BITS_PER_INT (SIZEOF_INT * CPU_BITS_PER_CHAR)
357 #ifndef CPU_BITS_PER_LONG
358 #define CPU_BITS_PER_LONG (SIZEOF_LONG * CPU_BITS_PER_CHAR)
361 #ifndef CPU_BITS_PER_PTR
362 #define CPU_BITS_PER_PTR (SIZEOF_PTR * CPU_BITS_PER_CHAR)
366 /* Sanity checks for the above definitions */
367 STATIC_ASSERT(sizeof(char) == SIZEOF_CHAR);
368 STATIC_ASSERT(sizeof(short) == SIZEOF_SHORT);
369 STATIC_ASSERT(sizeof(long) == SIZEOF_LONG);
370 STATIC_ASSERT(sizeof(int) == SIZEOF_INT);
374 * \def SCHEDULER_IDLE
376 * \brief Invoked by the scheduler to stop the CPU when idle.
378 * This hook can be redefined to put the CPU in low-power mode, or to
379 * profile system load with an external strobe, or to save CPU cycles
380 * in hosted environments such as emulators.
383 #if defined(ARCH_EMUL) && (ARCH & ARCH_EMUL)
384 /* This emulator hook should yield the CPU to the host. */
386 void SchedulerIdle(void);
388 #define CPU_IDLE SchedulerIdle()
389 #else /* !ARCH_EMUL */
390 #define CPU_IDLE do { /* nothing */ } while (0)
391 #endif /* !ARCH_EMUL */
392 #endif /* !CPU_IDLE */
395 #define SCHEDULER_IDLE CPU_IDLE
397 #endif /* DEVLIB_CPU_H */