4 * Copyright 2004 Develer S.r.l. (http://www.develer.com/)
5 * Copyright 2004 Giovanni Bajo
6 * This file is part of DevLib - See devlib/README for information.
9 * \brief CPU-specific definitions
13 * \author Giovanni Bajo <rasky@develer.com>
14 * \author Bernardo Innocenti <bernie@develer.com>
15 * \author Stefano Fedrigo <aleph@develer.com>
20 * Revision 1.7 2004/07/20 23:26:48 bernie
21 * Fix two errors introduced by previous commit.
23 * Revision 1.6 2004/07/20 23:12:16 bernie
24 * Rationalize and document SCHEDULER_IDLE.
26 * Revision 1.5 2004/07/20 16:20:35 bernie
27 * Move byte-order macros to mware/byteorder.h; Add missing author names.
29 * Revision 1.4 2004/07/20 16:06:04 bernie
30 * Add macros to handle endianess issues.
32 * Revision 1.3 2004/07/18 21:49:51 bernie
35 * Revision 1.2 2004/06/03 11:27:09 bernie
36 * Add dual-license information.
38 * Revision 1.1 2004/05/23 17:48:35 bernie
39 * Add top-level files.
47 //! Initialization value for registers in stack frame
48 #define CPU_REG_INIT_VALUE(reg) 0
50 // Macros for determining CPU endianness
51 #define CPU_BIG_ENDIAN 0x1234
52 #define CPU_LITTLE_ENDIAN 0x3412
55 #if defined(__IAR_SYSTEMS_ICC) || defined(__IAR_SYSTEMS_ICC__) /* 80C196 */
57 #define DISABLE_INTS disable_interrupt()
58 #define ENABLE_INTS enable_interrupt()
59 #define NOP nop_instruction()
61 typedef uint16_t cpuflags_t; // FIXME
62 typedef unsigned int cpustack_t;
64 #define CPU_REGS_CNT 16
65 #define CPU_STACK_GROWS_UPWARD 0
66 #define CPU_SP_ON_EMPTY_SLOT 0
67 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
69 #elif defined(__i386__) || defined(_MSC_VER) /* x86 */
71 #define NOP asm volatile ("nop")
72 #define DISABLE_INTS /* nothing */
73 #define ENABLE_INTS /* nothing */
75 typedef uint32_t cpuflags_t; // FIXME
76 typedef uint32_t cpustack_t;
78 #define CPU_REGS_CNT 7
79 #define CPU_STACK_GROWS_UPWARD 0
80 #define CPU_SP_ON_EMPTY_SLOT 0
81 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
83 #elif defined(__m56800E__) || defined(__m56800__) /* DSP56K */
86 #define DISABLE_INTS do { asm(bfset #0x0200,SR); asm(nop); } while (0)
87 #define ENABLE_INTS do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
89 #define DISABLE_IRQSAVE(x) \
90 do { asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
91 #define ENABLE_IRQRESTORE(x) \
92 do { asm(move x,SR); } while (0)
94 typedef uint16_t cpuflags_t;
95 typedef unsigned int cpustack_t;
97 #define CPU_REGS_CNT FIXME
98 #define CPU_SAVED_REGS_CNT 28
99 #define CPU_STACK_GROWS_UPWARD 1
100 #define CPU_SP_ON_EMPTY_SLOT 0
101 #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
103 #undef CPU_REG_INIT_VALUE
104 INLINE uint16_t CPU_REG_INIT_VALUE(int reg)
109 asm(move OMR, omr_img);
110 return omr_img & (BV(3)/*EX*/ | BV(1)/*MB*/ | BV(0)/*MA*/);
112 else if (reg == 16)/*M01*/
117 #elif defined (__AVR__)
119 #define NOP asm volatile ("nop" ::)
120 #define DISABLE_INTS asm volatile ("cli" ::)
121 #define ENABLE_INTS asm volatile ("sei" ::)
123 #define DISABLE_IRQSAVE(x) \
125 __asm__ __volatile__( \
126 "in %0,__SREG__\n\t" \
128 : "=r" (x) : /* no inputs */ : "cc" \
132 #define ENABLE_IRQRESTORE(x) \
134 __asm__ __volatile__( \
135 "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
139 typedef uint8_t cpuflags_t;
140 typedef uint8_t cpustack_t;
142 #define CPU_REGS_CNT 32
143 #define CPU_SAVED_REGS_CNT 18
144 #define CPU_STACK_GROWS_UPWARD 0
145 #define CPU_SP_ON_EMPTY_SLOT 1
146 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
152 #ifndef CPU_STACK_GROWS_UPWARD
153 #error CPU_STACK_GROWS_UPWARD should have been defined to either 0 or 1
156 #ifndef CPU_SP_ON_EMPTY_SLOT
157 #error CPU_SP_ON_EMPTY_SLOT should have been defined to either 0 or 1
161 * Support stack handling peculiarities of a few CPUs.
163 * Most processors let their stack grow downward and
164 * keep SP pointing at the last pushed value.
166 #if !CPU_STACK_GROWS_UPWARD
167 #if !CPU_SP_ON_EMPTY_SLOT
168 /* Most microprocessors (x86, m68k...) */
169 #define CPU_PUSH_WORD(sp, data) \
170 do { *--(sp) = (data); } while (0)
171 #define CPU_POP_WORD(sp) \
175 #define CPU_PUSH_WORD(sp, data) \
176 do { *(sp)-- = (data); } while (0)
177 #define CPU_POP_WORD(sp) \
181 #else /* CPU_STACK_GROWS_UPWARD */
183 #if !CPU_SP_ON_EMPTY_SLOT
184 /* DSP56K and other weirdos */
185 #define CPU_PUSH_WORD(sp, data) \
186 do { *++(sp) = (cpustack_t)(data); } while (0)
187 #define CPU_POP_WORD(sp) \
190 #error I bet you cannot find a CPU like this
195 #if defined(__m56800E__) || defined(__m56800__)
196 /* DSP56k pushes both PC and SR to the stack in the JSR instruction, but
197 * RTS discards SR while returning (it does not restore it). So we push
198 * 0 to fake the same context.
200 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
202 CPU_PUSH_WORD((sp), (func)); \
203 CPU_PUSH_WORD((sp), 0); \
206 #elif defined (__AVR__)
207 /* In AVR, the addresses are pushed into the stack as little-endian, while
208 * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
209 * no natural endianess).
211 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
213 uint16_t funcaddr = (uint16_t)(func); \
214 CPU_PUSH_WORD((sp), funcaddr); \
215 CPU_PUSH_WORD((sp), funcaddr>>8); \
219 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
220 CPU_PUSH_WORD((sp), (func))
225 * \name SCHEDULER_IDLE
227 * \brief Invoked by the scheduler to stop the CPU when idle.
229 * This hook can be redefined to put the CPU in low-power mode, or to
230 * profile system load with an external strobe, or to save CPU cycles
231 * in hosted environments such as emulators.
233 #ifndef SCHEDULER_IDLE
234 #if defined(ARCH_EMUL) && (ARCH & ARCH_EMUL)
235 /* This emulator hook should yeld the CPU to the host. */
237 void SchedulerIdle(void);
239 #else /* !ARCH_EMUL */
240 #define SCHEDULER_IDLE /* nothing */
241 #endif /* !ARCH_EMUL */
242 #endif /* !SCHEDULER_IDLE */