4 * Copyright 2004 Develer S.r.l. (http://www.develer.com/)
5 * Copyright 2004 Giovanni Bajo
6 * This file is part of DevLib - See devlib/README for information.
9 * \brief CPU-specific definitions
13 * \author Giovanni Bajo <rasky@develer.com>
14 * \author Bernardo Innocenti <bernie@develer.com>
15 * \author Stefano Fedrigo <aleph@develer.com>
20 *#* Revision 1.16 2004/08/29 21:58:33 bernie
21 *#* Rename BITS_PER_XYZ macros; Add sanity checks.
23 *#* Revision 1.15 2004/08/25 14:12:08 rasky
24 *#* Aggiornato il comment block dei log RCS
26 *#* Revision 1.14 2004/08/24 13:29:28 bernie
27 *#* Trim CVS log; Rename header guards.
29 *#* Revision 1.12 2004/08/14 19:37:57 rasky
30 *#* Merge da SC: macros.h, pool.h, BIT_CHANGE, nome dei processi, etc.
32 *#* Revision 1.11 2004/08/05 17:39:56 bernie
33 *#* Fix a Doxygen tag.
35 *#* Revision 1.10 2004/08/02 20:20:29 aleph
36 *#* Merge from project_ks
38 *#* Revision 1.9 2004/07/30 14:24:16 rasky
39 *#* Task switching con salvataggio perfetto stato di interrupt (SR)
40 *#* Kernel monitor per dump informazioni su stack dei processi
45 #include "compiler.h" /* for uintXX_t, PP_CAT3(), PP_STRINGIZE() */
48 // Macros for determining CPU endianness
49 #define CPU_BIG_ENDIAN 0x1234
50 #define CPU_LITTLE_ENDIAN 0x3412
52 // Macros to include cpu-specific version of the headers
53 #define CPU_HEADER(module) PP_STRINGIZE(PP_CAT3(module, _, CPU_ID).h)
58 #define DISABLE_INTS disable_interrupt()
59 #define ENABLE_INTS enable_interrupt()
60 #define NOP nop_instruction()
62 typedef uint16_t cpuflags_t; // FIXME
63 typedef unsigned int cpustack_t;
65 #define CPU_REG_BITS 16
66 #define CPU_REGS_CNT 16
67 #define CPU_STACK_GROWS_UPWARD 0
68 #define CPU_SP_ON_EMPTY_SLOT 0
69 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
73 #define NOP asm volatile ("nop")
74 #define DISABLE_INTS /* nothing */
75 #define ENABLE_INTS /* nothing */
77 typedef uint32_t cpuflags_t; // FIXME
78 typedef uint32_t cpustack_t;
80 #define CPU_REG_BITS 32
81 #define CPU_REGS_CNT 7
82 #define CPU_STACK_GROWS_UPWARD 0
83 #define CPU_SP_ON_EMPTY_SLOT 0
84 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
89 #define DISABLE_INTS do { asm(bfset #0x0200,SR); asm(nop); } while (0)
90 #define ENABLE_INTS do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
92 #define DISABLE_IRQSAVE(x) \
93 do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
94 #define ENABLE_IRQRESTORE(x) \
95 do { (void)x; asm(move x,SR); } while (0)
97 typedef uint16_t cpuflags_t;
98 typedef unsigned int cpustack_t;
100 #define CPU_REG_BITS 16
101 #define CPU_REGS_CNT FIXME
102 #define CPU_SAVED_REGS_CNT 8
103 #define CPU_STACK_GROWS_UPWARD 1
104 #define CPU_SP_ON_EMPTY_SLOT 0
105 #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
107 /* Memory is word-addessed in the DSP56K */
108 #define CPU_BITS_PER_CHAR 16
109 #define SIZEOF_SHORT 1
111 #define SIZEOF_LONG 2
116 #define NOP asm volatile ("nop" ::)
117 #define DISABLE_INTS asm volatile ("cli" ::)
118 #define ENABLE_INTS asm volatile ("sei" ::)
120 #define DISABLE_IRQSAVE(x) \
122 __asm__ __volatile__( \
123 "in %0,__SREG__\n\t" \
125 : "=r" (x) : /* no inputs */ : "cc" \
129 #define ENABLE_IRQRESTORE(x) \
131 __asm__ __volatile__( \
132 "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
136 typedef uint8_t cpuflags_t;
137 typedef uint8_t cpustack_t;
139 /* Register counts include SREG too */
140 #define CPU_REG_BITS 8
141 #define CPU_REGS_CNT 33
142 #define CPU_SAVED_REGS_CNT 19
143 #define CPU_STACK_GROWS_UPWARD 0
144 #define CPU_SP_ON_EMPTY_SLOT 1
145 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
148 * Initialization value for registers in stack frame.
149 * The register index is not directly corrispondent to CPU
150 * register numbers. Index 0 is the SREG register: the initial
151 * value is all 0 but the interrupt bit (bit 7).
153 #define CPU_REG_INIT_VALUE(reg) (reg == 0 ? 0x80 : 0)
158 //! Default for macro not defined in the right arch section
159 #ifndef CPU_REG_INIT_VALUE
160 #define CPU_REG_INIT_VALUE(reg) 0
164 #ifndef CPU_STACK_GROWS_UPWARD
165 #error CPU_STACK_GROWS_UPWARD should have been defined to either 0 or 1
168 #ifndef CPU_SP_ON_EMPTY_SLOT
169 #error CPU_SP_ON_EMPTY_SLOT should have been defined to either 0 or 1
173 * Support stack handling peculiarities of a few CPUs.
175 * Most processors let their stack grow downward and
176 * keep SP pointing at the last pushed value.
178 #if !CPU_STACK_GROWS_UPWARD
179 #if !CPU_SP_ON_EMPTY_SLOT
180 /* Most microprocessors (x86, m68k...) */
181 #define CPU_PUSH_WORD(sp, data) \
182 do { *--(sp) = (data); } while (0)
183 #define CPU_POP_WORD(sp) \
187 #define CPU_PUSH_WORD(sp, data) \
188 do { *(sp)-- = (data); } while (0)
189 #define CPU_POP_WORD(sp) \
193 #else /* CPU_STACK_GROWS_UPWARD */
195 #if !CPU_SP_ON_EMPTY_SLOT
196 /* DSP56K and other weirdos */
197 #define CPU_PUSH_WORD(sp, data) \
198 do { *++(sp) = (cpustack_t)(data); } while (0)
199 #define CPU_POP_WORD(sp) \
202 #error I bet you cannot find a CPU like this
208 /* DSP56k pushes both PC and SR to the stack in the JSR instruction, but
209 * RTS discards SR while returning (it does not restore it). So we push
210 * 0 to fake the same context.
212 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
214 CPU_PUSH_WORD((sp), (func)); \
215 CPU_PUSH_WORD((sp), 0x100); \
219 /* In AVR, the addresses are pushed into the stack as little-endian, while
220 * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
221 * no natural endianess).
223 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
225 uint16_t funcaddr = (uint16_t)(func); \
226 CPU_PUSH_WORD((sp), funcaddr); \
227 CPU_PUSH_WORD((sp), funcaddr>>8); \
231 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
232 CPU_PUSH_WORD((sp), (func))
237 * \name Default type sizes
239 * \def SIZEOF_CHAR SIZEOF_SHORT SIZEOF_INT SIZEOF_LONG SIZEOF_PTR
240 * \def CPU_BITS_PER_CHAR CPU_BITS_PER_SHORT CPU_BITS_PER_INT
241 * \def CPU_BITS_PER_LONG CPU_BITS_PER_PTR
243 * These defaults are reasonable for most 16/32bit machines.
244 * Some of these macros may be overridden by CPU-specific code above.
246 * ANSI C requires that the following equations be true:
248 * sizeof(char) <= sizeof(short) <= sizeof(int) <= sizeof(long)
249 * sizeof(float) <= sizeof(double)
250 * CPU_BITS_PER_CHAR >= 8
251 * CPU_BITS_PER_SHORT >= 8
252 * CPU_BITS_PER_INT >= 16
253 * CPU_BITS_PER_LONG >= 32
258 #define SIZEOF_CHAR 1
262 #define SIZEOF_SHORT 2
266 #if CPU_REG_BITS < 32
271 #endif /* !SIZEOF_INT */
274 #define SIZEOF_LONG 4
278 #define SIZEOF_PTR SIZEOF_INT
281 #ifndef CPU_BITS_PER_CHAR
282 #define CPU_BITS_PER_CHAR (SIZEOF_CHAR * 8)
285 #ifndef CPU_BITS_PER_SHORT
286 #define CPU_BITS_PER_SHORT (SIZEOF_SHORT * CPU_BITS_PER_CHAR)
289 #ifndef CPU_BITS_PER_INT
290 #define CPU_BITS_PER_INT (SIZEOF_INT * CPU_BITS_PER_CHAR)
293 #ifndef CPU_BITS_PER_LONG
294 #define CPU_BITS_PER_LONG (SIZEOF_LONG * CPU_BITS_PER_CHAR)
297 #ifndef CPU_BITS_PER_PTR
298 #define CPU_BITS_PER_PTR (SIZEOF_PTR * CPU_BITS_PER_CHAR)
302 /* Sanity checks for the above definitions */
303 STATIC_ASSERT(sizeof(char) == SIZEOF_CHAR);
304 STATIC_ASSERT(sizeof(short) == SIZEOF_SHORT);
305 STATIC_ASSERT(sizeof(long) == SIZEOF_LONG);
306 STATIC_ASSERT(sizeof(int) == SIZEOF_INT);
310 * \def SCHEDULER_IDLE
312 * \brief Invoked by the scheduler to stop the CPU when idle.
314 * This hook can be redefined to put the CPU in low-power mode, or to
315 * profile system load with an external strobe, or to save CPU cycles
316 * in hosted environments such as emulators.
318 #ifndef SCHEDULER_IDLE
319 #if defined(ARCH_EMUL) && (ARCH & ARCH_EMUL)
320 /* This emulator hook should yield the CPU to the host. */
322 void SchedulerIdle(void);
324 #define SCHEDULER_IDLE SchedulerIdle()
325 #else /* !ARCH_EMUL */
326 #define SCHEDULER_IDLE do { /* nothing */ } while (0)
327 #endif /* !ARCH_EMUL */
328 #endif /* !SCHEDULER_IDLE */
330 #endif /* DEVLIB_CPU_H */