4 * Copyright 2004 Develer S.r.l. (http://www.develer.com/)
5 * Copyright 2004 Giovanni Bajo
6 * This file is part of DevLib - See devlib/README for information.
9 * \brief CPU-specific definitions
13 * \author Giovanni Bajo <rasky@develer.com>
14 * \author Bernardo Innocenti <bernie@develer.com>
15 * \author Stefano Fedrigo <aleph@develer.com>
20 * Revision 1.8 2004/07/30 14:15:53 rasky
21 * Nuovo supporto unificato per detect della CPU
23 * Revision 1.7 2004/07/20 23:26:48 bernie
24 * Fix two errors introduced by previous commit.
26 * Revision 1.6 2004/07/20 23:12:16 bernie
27 * Rationalize and document SCHEDULER_IDLE.
29 * Revision 1.5 2004/07/20 16:20:35 bernie
30 * Move byte-order macros to mware/byteorder.h; Add missing author names.
32 * Revision 1.4 2004/07/20 16:06:04 bernie
33 * Add macros to handle endianess issues.
35 * Revision 1.3 2004/07/18 21:49:51 bernie
38 * Revision 1.2 2004/06/03 11:27:09 bernie
39 * Add dual-license information.
41 * Revision 1.1 2004/05/23 17:48:35 bernie
42 * Add top-level files.
51 //! Initialization value for registers in stack frame
52 #define CPU_REG_INIT_VALUE(reg) 0
54 // Macros for determining CPU endianess
55 #define CPU_BIG_ENDIAN 0x1234
56 #define CPU_LITTLE_ENDIAN 0x3412
58 // Macros to include cpu-specific version of the headers
59 #define CPU_HEADER(module) PP_STRINGIZE(PP_CAT4(module, _, CPU_ID, .h))
64 #define DISABLE_INTS disable_interrupt()
65 #define ENABLE_INTS enable_interrupt()
66 #define NOP nop_instruction()
68 typedef uint16_t cpuflags_t; // FIXME
69 typedef unsigned int cpustack_t;
71 #define CPU_REGS_CNT 16
72 #define CPU_STACK_GROWS_UPWARD 0
73 #define CPU_SP_ON_EMPTY_SLOT 0
74 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
78 #define NOP asm volatile ("nop")
79 #define DISABLE_INTS /* nothing */
80 #define ENABLE_INTS /* nothing */
82 typedef uint32_t cpuflags_t; // FIXME
83 typedef uint32_t cpustack_t;
85 #define CPU_REGS_CNT 7
86 #define CPU_STACK_GROWS_UPWARD 0
87 #define CPU_SP_ON_EMPTY_SLOT 0
88 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
93 #define DISABLE_INTS do { asm(bfset #0x0200,SR); asm(nop); } while (0)
94 #define ENABLE_INTS do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
96 #define DISABLE_IRQSAVE(x) \
97 do { asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
98 #define ENABLE_IRQRESTORE(x) \
99 do { asm(move x,SR); } while (0)
101 typedef uint16_t cpuflags_t;
102 typedef unsigned int cpustack_t;
104 #define CPU_REGS_CNT FIXME
105 #define CPU_SAVED_REGS_CNT 28
106 #define CPU_STACK_GROWS_UPWARD 1
107 #define CPU_SP_ON_EMPTY_SLOT 0
108 #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
110 #undef CPU_REG_INIT_VALUE
111 INLINE uint16_t CPU_REG_INIT_VALUE(int reg)
116 asm(move OMR, omr_img);
117 return omr_img & (BV(3)/*EX*/ | BV(1)/*MB*/ | BV(0)/*MA*/);
119 else if (reg == 16)/*M01*/
124 #elif defined (__AVR__)
126 #define NOP asm volatile ("nop" ::)
127 #define DISABLE_INTS asm volatile ("cli" ::)
128 #define ENABLE_INTS asm volatile ("sei" ::)
130 #define DISABLE_IRQSAVE(x) \
132 __asm__ __volatile__( \
133 "in %0,__SREG__\n\t" \
135 : "=r" (x) : /* no inputs */ : "cc" \
139 #define ENABLE_IRQRESTORE(x) \
141 __asm__ __volatile__( \
142 "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
146 typedef uint8_t cpuflags_t;
147 typedef uint8_t cpustack_t;
149 #define CPU_REGS_CNT 32
150 #define CPU_SAVED_REGS_CNT 18
151 #define CPU_STACK_GROWS_UPWARD 0
152 #define CPU_SP_ON_EMPTY_SLOT 1
153 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
157 #ifndef CPU_STACK_GROWS_UPWARD
158 #error CPU_STACK_GROWS_UPWARD should have been defined to either 0 or 1
161 #ifndef CPU_SP_ON_EMPTY_SLOT
162 #error CPU_SP_ON_EMPTY_SLOT should have been defined to either 0 or 1
166 * Support stack handling peculiarities of a few CPUs.
168 * Most processors let their stack grow downward and
169 * keep SP pointing at the last pushed value.
171 #if !CPU_STACK_GROWS_UPWARD
172 #if !CPU_SP_ON_EMPTY_SLOT
173 /* Most microprocessors (x86, m68k...) */
174 #define CPU_PUSH_WORD(sp, data) \
175 do { *--(sp) = (data); } while (0)
176 #define CPU_POP_WORD(sp) \
180 #define CPU_PUSH_WORD(sp, data) \
181 do { *(sp)-- = (data); } while (0)
182 #define CPU_POP_WORD(sp) \
186 #else /* CPU_STACK_GROWS_UPWARD */
188 #if !CPU_SP_ON_EMPTY_SLOT
189 /* DSP56K and other weirdos */
190 #define CPU_PUSH_WORD(sp, data) \
191 do { *++(sp) = (cpustack_t)(data); } while (0)
192 #define CPU_POP_WORD(sp) \
195 #error I bet you cannot find a CPU like this
201 /* DSP56k pushes both PC and SR to the stack in the JSR instruction, but
202 * RTS discards SR while returning (it does not restore it). So we push
203 * 0 to fake the same context.
205 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
207 CPU_PUSH_WORD((sp), (func)); \
208 CPU_PUSH_WORD((sp), 0); \
211 #elif defined (__AVR__)
212 /* In AVR, the addresses are pushed into the stack as little-endian, while
213 * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
214 * no natural endianess).
216 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
218 uint16_t funcaddr = (uint16_t)(func); \
219 CPU_PUSH_WORD((sp), funcaddr); \
220 CPU_PUSH_WORD((sp), funcaddr>>8); \
224 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
225 CPU_PUSH_WORD((sp), (func))
230 * \name SCHEDULER_IDLE
232 * \brief Invoked by the scheduler to stop the CPU when idle.
234 * This hook can be redefined to put the CPU in low-power mode, or to
235 * profile system load with an external strobe, or to save CPU cycles
236 * in hosted environments such as emulators.
238 #ifndef SCHEDULER_IDLE
239 #if defined(ARCH_EMUL) && (ARCH & ARCH_EMUL)
240 /* This emulator hook should yeld the CPU to the host. */
242 void SchedulerIdle(void);
244 #else /* !ARCH_EMUL */
245 #define SCHEDULER_IDLE /* nothing */
246 #endif /* !ARCH_EMUL */
247 #endif /* !SCHEDULER_IDLE */