4 * Copyright 2004 Develer S.r.l. (http://www.develer.com/)
5 * Copyright 2004 Giovanni Bajo
6 * This file is part of DevLib - See devlib/README for information.
9 * \brief CPU-specific definitions
13 * \author Giovanni Bajo <rasky@develer.com>
14 * \author Bernardo Innocenti <bernie@develer.com>
15 * \author Stefano Fedrigo <aleph@develer.com>
20 *#* Revision 1.15 2004/08/25 14:12:08 rasky
21 *#* Aggiornato il comment block dei log RCS
23 *#* Revision 1.14 2004/08/24 13:29:28 bernie
24 *#* Trim CVS log; Rename header guards.
26 *#* Revision 1.12 2004/08/14 19:37:57 rasky
27 *#* Merge da SC: macros.h, pool.h, BIT_CHANGE, nome dei processi, etc.
29 *#* Revision 1.11 2004/08/05 17:39:56 bernie
30 *#* Fix a Doxygen tag.
32 *#* Revision 1.10 2004/08/02 20:20:29 aleph
33 *#* Merge from project_ks
35 *#* Revision 1.9 2004/07/30 14:24:16 rasky
36 *#* Task switching con salvataggio perfetto stato di interrupt (SR)
37 *#* Kernel monitor per dump informazioni su stack dei processi
42 #include "compiler.h" /* for uintXX_t, PP_CAT3(), PP_STRINGIZE() */
45 // Macros for determining CPU endianness
46 #define CPU_BIG_ENDIAN 0x1234
47 #define CPU_LITTLE_ENDIAN 0x3412
49 // Macros to include cpu-specific version of the headers
50 #define CPU_HEADER(module) PP_STRINGIZE(PP_CAT3(module, _, CPU_ID).h)
55 #define DISABLE_INTS disable_interrupt()
56 #define ENABLE_INTS enable_interrupt()
57 #define NOP nop_instruction()
59 typedef uint16_t cpuflags_t; // FIXME
60 typedef unsigned int cpustack_t;
62 #define CPU_REG_BITS 16
63 #define CPU_REGS_CNT 16
64 #define CPU_STACK_GROWS_UPWARD 0
65 #define CPU_SP_ON_EMPTY_SLOT 0
66 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
70 #define NOP asm volatile ("nop")
71 #define DISABLE_INTS /* nothing */
72 #define ENABLE_INTS /* nothing */
74 typedef uint32_t cpuflags_t; // FIXME
75 typedef uint32_t cpustack_t;
77 #define CPU_REG_BITS 32
78 #define CPU_REGS_CNT 7
79 #define CPU_STACK_GROWS_UPWARD 0
80 #define CPU_SP_ON_EMPTY_SLOT 0
81 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
86 #define DISABLE_INTS do { asm(bfset #0x0200,SR); asm(nop); } while (0)
87 #define ENABLE_INTS do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
89 #define DISABLE_IRQSAVE(x) \
90 do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
91 #define ENABLE_IRQRESTORE(x) \
92 do { (void)x; asm(move x,SR); } while (0)
94 typedef uint16_t cpuflags_t;
95 typedef unsigned int cpustack_t;
97 #define CPU_REG_BITS 16
98 #define CPU_REGS_CNT FIXME
99 #define CPU_SAVED_REGS_CNT 8
100 #define CPU_STACK_GROWS_UPWARD 1
101 #define CPU_SP_ON_EMPTY_SLOT 0
102 #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
104 /* Memory is word-addessed in the DSP56K */
105 #define BITSP_PER_CHAR 16
106 #define SIZEOF_SHORT 1
108 #define SIZEOF_LONG 2
113 #define NOP asm volatile ("nop" ::)
114 #define DISABLE_INTS asm volatile ("cli" ::)
115 #define ENABLE_INTS asm volatile ("sei" ::)
117 #define DISABLE_IRQSAVE(x) \
119 __asm__ __volatile__( \
120 "in %0,__SREG__\n\t" \
122 : "=r" (x) : /* no inputs */ : "cc" \
126 #define ENABLE_IRQRESTORE(x) \
128 __asm__ __volatile__( \
129 "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
133 typedef uint8_t cpuflags_t;
134 typedef uint8_t cpustack_t;
136 /* Register counts include SREG too */
137 #define CPU_REG_BITS 8
138 #define CPU_REGS_CNT 33
139 #define CPU_SAVED_REGS_CNT 19
140 #define CPU_STACK_GROWS_UPWARD 0
141 #define CPU_SP_ON_EMPTY_SLOT 1
142 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
145 * Initialization value for registers in stack frame.
146 * The register index is not directly corrispondent to CPU
147 * register numbers. Index 0 is the SREG register: the initial
148 * value is all 0 but the interrupt bit (bit 7).
150 #define CPU_REG_INIT_VALUE(reg) (reg == 0 ? 0x80 : 0)
155 //! Default for macro not defined in the right arch section
156 #ifndef CPU_REG_INIT_VALUE
157 #define CPU_REG_INIT_VALUE(reg) 0
161 #ifndef CPU_STACK_GROWS_UPWARD
162 #error CPU_STACK_GROWS_UPWARD should have been defined to either 0 or 1
165 #ifndef CPU_SP_ON_EMPTY_SLOT
166 #error CPU_SP_ON_EMPTY_SLOT should have been defined to either 0 or 1
170 * Support stack handling peculiarities of a few CPUs.
172 * Most processors let their stack grow downward and
173 * keep SP pointing at the last pushed value.
175 #if !CPU_STACK_GROWS_UPWARD
176 #if !CPU_SP_ON_EMPTY_SLOT
177 /* Most microprocessors (x86, m68k...) */
178 #define CPU_PUSH_WORD(sp, data) \
179 do { *--(sp) = (data); } while (0)
180 #define CPU_POP_WORD(sp) \
184 #define CPU_PUSH_WORD(sp, data) \
185 do { *(sp)-- = (data); } while (0)
186 #define CPU_POP_WORD(sp) \
190 #else /* CPU_STACK_GROWS_UPWARD */
192 #if !CPU_SP_ON_EMPTY_SLOT
193 /* DSP56K and other weirdos */
194 #define CPU_PUSH_WORD(sp, data) \
195 do { *++(sp) = (cpustack_t)(data); } while (0)
196 #define CPU_POP_WORD(sp) \
199 #error I bet you cannot find a CPU like this
205 /* DSP56k pushes both PC and SR to the stack in the JSR instruction, but
206 * RTS discards SR while returning (it does not restore it). So we push
207 * 0 to fake the same context.
209 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
211 CPU_PUSH_WORD((sp), (func)); \
212 CPU_PUSH_WORD((sp), 0x100); \
216 /* In AVR, the addresses are pushed into the stack as little-endian, while
217 * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
218 * no natural endianess).
220 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
222 uint16_t funcaddr = (uint16_t)(func); \
223 CPU_PUSH_WORD((sp), funcaddr); \
224 CPU_PUSH_WORD((sp), funcaddr>>8); \
228 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
229 CPU_PUSH_WORD((sp), (func))
234 * \def SIZEOF_CHAR SIZEOF_SHORT SIZEOF_INT SIZEOF_LONG SIZEOF_PTR
235 * \def BITS_PER_CHAR BITS_PER_SHORT BITS_PER_INT BITS_PER_LONG BITS_PER_PTR
237 * \brief Default type sizes
239 * These defaults are reasonable for most 16/32bit machines.
240 * Some of these macros may be overridden by CPU-specific code above.
242 * ANSI C specifies that the following equations must be true:
244 * sizeof(char) <= sizeof(short) <= sizeof(int) <= sizeof(long)
245 * sizeof(float) <= sizeof(double)
247 * BITS_PER_SHORT >= 8
249 * BITS_PER_LONG >= 32
254 #define SIZEOF_CHAR 1
258 #define SIZEOF_SHORT 2
262 #if CPU_REG_BITS < 32
267 #endif /* !SIZEOF_INT */
270 #define SIZEOF_LONG 4
274 #define SIZEOF_PTR SIZEOF_INT
277 #ifndef BITS_PER_CHAR
278 #define BITS_PER_CHAR (SIZEOF_CHAR * 8)
281 #ifndef BITS_PER_SHORT
282 #define BITS_PER_SHORT (SIZEOF_SHORT * BITS_PER_CHAR)
286 #define BITS_PER_INT (SIZEOF_INT * BITS_PER_CHAR)
289 #ifndef BITS_PER_LONG
290 #define BITS_PER_LONG (SIZEOF_LONG * BITS_PER_CHAR)
294 #define BITS_PER_PTR (SIZEOF_PTR * BITS_PER_CHAR)
300 * \def SCHEDULER_IDLE
302 * \brief Invoked by the scheduler to stop the CPU when idle.
304 * This hook can be redefined to put the CPU in low-power mode, or to
305 * profile system load with an external strobe, or to save CPU cycles
306 * in hosted environments such as emulators.
308 #ifndef SCHEDULER_IDLE
309 #if defined(ARCH_EMUL) && (ARCH & ARCH_EMUL)
310 /* This emulator hook should yield the CPU to the host. */
312 void SchedulerIdle(void);
314 #define SCHEDULER_IDLE SchedulerIdle()
315 #else /* !ARCH_EMUL */
316 #define SCHEDULER_IDLE do { /* nothing */ } while (0)
317 #endif /* !ARCH_EMUL */
318 #endif /* !SCHEDULER_IDLE */
320 #endif /* DEVLIB_CPU_H */