4 * Copyright 2004 Develer S.r.l. (http://www.develer.com/)
5 * Copyright 2004 Giovanni Bajo
6 * This file is part of DevLib - See devlib/README for information.
9 * \brief CPU-specific definitions
13 * \author Giovanni Bajo <rasky@develer.com>
14 * \author Bernardo Innocenti <bernie@develer.com>
15 * \author Stefano Fedrigo <aleph@develer.com>
20 * Revision 1.9 2004/07/30 14:24:16 rasky
21 * Task switching con salvataggio perfetto stato di interrupt (SR)
22 * Kernel monitor per dump informazioni su stack dei processi
24 * Revision 1.8 2004/07/30 14:15:53 rasky
25 * Nuovo supporto unificato per detect della CPU
27 * Revision 1.7 2004/07/20 23:26:48 bernie
28 * Fix two errors introduced by previous commit.
30 * Revision 1.6 2004/07/20 23:12:16 bernie
31 * Rationalize and document SCHEDULER_IDLE.
33 * Revision 1.5 2004/07/20 16:20:35 bernie
34 * Move byte-order macros to mware/byteorder.h; Add missing author names.
36 * Revision 1.4 2004/07/20 16:06:04 bernie
37 * Add macros to handle endianess issues.
39 * Revision 1.3 2004/07/18 21:49:51 bernie
42 * Revision 1.2 2004/06/03 11:27:09 bernie
43 * Add dual-license information.
45 * Revision 1.1 2004/05/23 17:48:35 bernie
46 * Add top-level files.
55 //! Initialization value for registers in stack frame
56 #define CPU_REG_INIT_VALUE(reg) 0
58 // Macros for determining CPU endianess
59 #define CPU_BIG_ENDIAN 0x1234
60 #define CPU_LITTLE_ENDIAN 0x3412
62 // Macros to include cpu-specific version of the headers
63 #define CPU_HEADER(module) PP_STRINGIZE(PP_CAT4(module, _, CPU_ID, .h))
68 #define DISABLE_INTS disable_interrupt()
69 #define ENABLE_INTS enable_interrupt()
70 #define NOP nop_instruction()
72 typedef uint16_t cpuflags_t; // FIXME
73 typedef unsigned int cpustack_t;
75 #define CPU_REGS_CNT 16
76 #define CPU_STACK_GROWS_UPWARD 0
77 #define CPU_SP_ON_EMPTY_SLOT 0
78 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
82 #define NOP asm volatile ("nop")
83 #define DISABLE_INTS /* nothing */
84 #define ENABLE_INTS /* nothing */
86 typedef uint32_t cpuflags_t; // FIXME
87 typedef uint32_t cpustack_t;
89 #define CPU_REGS_CNT 7
90 #define CPU_STACK_GROWS_UPWARD 0
91 #define CPU_SP_ON_EMPTY_SLOT 0
92 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
97 #define DISABLE_INTS do { asm(bfset #0x0200,SR); asm(nop); } while (0)
98 #define ENABLE_INTS do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
100 #define DISABLE_IRQSAVE(x) \
101 do { asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
102 #define ENABLE_IRQRESTORE(x) \
103 do { asm(move x,SR); } while (0)
105 typedef uint16_t cpuflags_t;
106 typedef unsigned int cpustack_t;
108 #define CPU_REGS_CNT FIXME
109 #define CPU_SAVED_REGS_CNT 8
110 #define CPU_STACK_GROWS_UPWARD 1
111 #define CPU_SP_ON_EMPTY_SLOT 0
112 #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
116 #define NOP asm volatile ("nop" ::)
117 #define DISABLE_INTS asm volatile ("cli" ::)
118 #define ENABLE_INTS asm volatile ("sei" ::)
120 #define DISABLE_IRQSAVE(x) \
122 __asm__ __volatile__( \
123 "in %0,__SREG__\n\t" \
125 : "=r" (x) : /* no inputs */ : "cc" \
129 #define ENABLE_IRQRESTORE(x) \
131 __asm__ __volatile__( \
132 "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
136 typedef uint8_t cpuflags_t;
137 typedef uint8_t cpustack_t;
139 #define CPU_REGS_CNT 32
140 #define CPU_SAVED_REGS_CNT 18
141 #define CPU_STACK_GROWS_UPWARD 0
142 #define CPU_SP_ON_EMPTY_SLOT 1
143 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
147 #ifndef CPU_STACK_GROWS_UPWARD
148 #error CPU_STACK_GROWS_UPWARD should have been defined to either 0 or 1
151 #ifndef CPU_SP_ON_EMPTY_SLOT
152 #error CPU_SP_ON_EMPTY_SLOT should have been defined to either 0 or 1
156 * Support stack handling peculiarities of a few CPUs.
158 * Most processors let their stack grow downward and
159 * keep SP pointing at the last pushed value.
161 #if !CPU_STACK_GROWS_UPWARD
162 #if !CPU_SP_ON_EMPTY_SLOT
163 /* Most microprocessors (x86, m68k...) */
164 #define CPU_PUSH_WORD(sp, data) \
165 do { *--(sp) = (data); } while (0)
166 #define CPU_POP_WORD(sp) \
170 #define CPU_PUSH_WORD(sp, data) \
171 do { *(sp)-- = (data); } while (0)
172 #define CPU_POP_WORD(sp) \
176 #else /* CPU_STACK_GROWS_UPWARD */
178 #if !CPU_SP_ON_EMPTY_SLOT
179 /* DSP56K and other weirdos */
180 #define CPU_PUSH_WORD(sp, data) \
181 do { *++(sp) = (cpustack_t)(data); } while (0)
182 #define CPU_POP_WORD(sp) \
185 #error I bet you cannot find a CPU like this
191 /* DSP56k pushes both PC and SR to the stack in the JSR instruction, but
192 * RTS discards SR while returning (it does not restore it). So we push
193 * 0 to fake the same context.
195 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
197 CPU_PUSH_WORD((sp), (func)); \
198 CPU_PUSH_WORD((sp), 0x100); \
202 /* In AVR, the addresses are pushed into the stack as little-endian, while
203 * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
204 * no natural endianess).
206 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
208 uint16_t funcaddr = (uint16_t)(func); \
209 CPU_PUSH_WORD((sp), funcaddr); \
210 CPU_PUSH_WORD((sp), funcaddr>>8); \
214 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
215 CPU_PUSH_WORD((sp), (func))
220 * \name SCHEDULER_IDLE
222 * \brief Invoked by the scheduler to stop the CPU when idle.
224 * This hook can be redefined to put the CPU in low-power mode, or to
225 * profile system load with an external strobe, or to save CPU cycles
226 * in hosted environments such as emulators.
228 #ifndef SCHEDULER_IDLE
229 #if defined(ARCH_EMUL) && (ARCH & ARCH_EMUL)
230 /* This emulator hook should yeld the CPU to the host. */
232 void SchedulerIdle(void);
234 #else /* !ARCH_EMUL */
235 #define SCHEDULER_IDLE /* nothing */
236 #endif /* !ARCH_EMUL */
237 #endif /* !SCHEDULER_IDLE */