4 * Copyright 2003, 2004 Develer S.r.l. (http://www.develer.com/)
10 * \author Stefano Fedrigo <aleph@develer.com>
11 * \author Bernardo Innocenti <bernie@develer.com>
13 * \brief Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation)
15 * \note This implementation is AVR specific.
20 *#* Revision 1.8 2004/08/25 14:12:08 rasky
21 *#* Aggiornato il comment block dei log RCS
23 *#* Revision 1.7 2004/08/24 16:48:40 bernie
24 *#* Note reason for including <macros.h>
26 *#* Revision 1.6 2004/08/24 14:27:20 bernie
29 *#* Revision 1.5 2004/08/24 13:46:48 bernie
30 *#* Include <macros.h>.
32 *#* Revision 1.4 2004/08/10 06:57:22 bernie
33 *#* eeprom_erase(): New function.
35 *#* Revision 1.3 2004/07/29 22:57:09 bernie
36 *#* Add 24LC16 support.
38 *#* Revision 1.2 2004/07/22 01:24:43 bernie
39 *#* Document AVR dependency.
41 *#* Revision 1.1 2004/07/20 17:11:18 bernie
42 *#* Import into DevLib.
48 #include <mware/byteorder.h> /* cpu_to_be16() */
49 #include <drv/kdebug.h>
51 #include <macros.h> // MIN()
53 #include <string.h> // memset()
58 /* Wait for TWINT flag set: bus is ready */
59 #define WAIT_TWI_READY do {} while (!(TWCR & BV(TWINT)))
61 /*! \name EEPROM control codes */
69 * Send START condition on the bus.
71 * \return true on success, false otherwise.
73 static bool twi_start(void)
75 TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN);
78 if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START)
81 DB(kprintf("!TW_(REP)START: %x\n", TWSR);)
87 * Send START condition and select slave for write.
89 * \return true on success, false otherwise.
91 static bool twi_start_w(uint8_t slave_addr)
93 ASSERT(slave_addr < 8);
96 * Loop on the select write sequence: when the eeprom is busy
97 * writing previously sent data it will reply to the SLA_W
98 * control byte with a NACK. In this case, we must
99 * keep trying until the eeprom responds with an ACK.
103 TWDR = SLA_W | (slave_addr << 1);
104 TWCR = BV(TWINT) | BV(TWEN);
107 if (TW_STATUS == TW_MT_SLA_ACK)
109 else if (TW_STATUS != TW_MT_SLA_NACK)
111 DB(kprintf("!TW_MT_SLA_(N)ACK: %x\n", TWSR);)
121 * Send START condition and select slave for read.
123 * \return true on success, false otherwise.
125 static bool twi_start_r(uint8_t slave_addr)
127 ASSERT(slave_addr < 8);
131 TWDR = SLA_R | (slave_addr << 1);
132 TWCR = BV(TWINT) | BV(TWEN);
135 if (TW_STATUS == TW_MR_SLA_ACK)
138 DB(kprintf("!TW_MR_SLA_ACK: %x\n", TWSR);)
146 * Send STOP condition.
148 static void twi_stop(void)
150 TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO);
155 * Send a sequence of bytes in master transmitter mode
156 * to the selected slave device through the TWI bus.
158 * \return true on success, false on error.
160 static bool twi_send(const uint8_t *buf, size_t count)
165 TWCR = BV(TWINT) | BV(TWEN);
167 if (TW_STATUS != TW_MT_DATA_ACK)
169 DB(kprintf("!TW_MT_DATA_ACK: %x\n", TWSR);)
179 * Receive a sequence of one or more bytes from the
180 * selected slave device in master receive mode through
183 * Received data is placed in \c buf.
185 * \return true on success, false on error
187 static bool twi_recv(uint8_t *buf, size_t count)
190 * When reading the last byte the TWEA bit is not
191 * set, and the eeprom should answer with NACK
195 TWCR = BV(TWINT) | BV(TWEN) | (count ? BV(TWEA) : 0);
200 if (TW_STATUS != TW_MR_DATA_ACK)
202 DB(kprintf("!TW_MR_DATA_ACK: %x\n", TWSR);)
208 if (TW_STATUS != TW_MR_DATA_NACK)
210 DB(kprintf("!TW_MR_DATA_NACK: %x\n", TWSR);)
221 * Copy \c count bytes from buffer \c buf to
222 * eeprom at address \c addr.
224 bool eeprom_write(e2addr_t addr, const void *buf, size_t count)
227 ASSERT(addr + count <= EEPROM_SIZE);
229 while (count && result)
232 * Split write in multiple sequential mode operations that
233 * don't cross page boundaries.
236 MIN(count, (size_t)(EEPROM_BLKSIZE - (addr & (EEPROM_BLKSIZE - 1))));
238 #if CONFIG_EEPROM_TYPE == EEPROM_24XX16
240 * The 24LC16 uses the slave address as a 3-bit
243 uint8_t blk_addr = (uint8_t)((addr >> 8) & 0x07);
244 uint8_t blk_offs = (uint8_t)addr;
247 twi_start_w(blk_addr)
248 && twi_send(&blk_offs, sizeof blk_offs)
249 && twi_send(buf, size);
251 #elif CONFIG_EEPROM_TYPE == EEPROM_24XX256
253 // 24LC256 wants big-endian addresses
254 uint16_t addr_be = cpu_to_be16(addr);
258 && twi_send((uint8_t *)&addr_be, sizeof addr_be)
259 && twi_send(buf, size);
262 #error Unknown device type
268 //kprintf("addr=%d, count=%d, size=%d, *#?=%d\n",
269 // addr, count, size,
270 // (EEPROM_BLKSIZE - (addr & (EEPROM_BLKSIZE - 1)))
273 /* Update count and addr for next operation */
276 buf = ((const char *)buf) + size;
284 * Copy \c count bytes at address \c addr
285 * from eeprom to RAM to buffer \c buf.
287 bool eeprom_read(e2addr_t addr, void *buf, size_t count)
289 ASSERT(addr + count <= EEPROM_SIZE);
291 #if CONFIG_EEPROM_TYPE == EEPROM_24XX16
293 * The 24LC16 uses the slave address as a 3-bit
296 uint8_t blk_addr = (uint8_t)((addr >> 8) & 0x07);
297 uint8_t blk_offs = (uint8_t)addr;
300 twi_start_w(blk_addr)
301 && twi_send(&blk_offs, sizeof blk_offs)
302 && twi_start_r(blk_addr)
303 && twi_recv(buf, count);
305 #elif CONFIG_EEPROM_TYPE == EEPROM_24XX256
307 // 24LC256 wants big-endian addresses
308 addr = cpu_to_be16(addr);
312 && twi_send((uint8_t *)&addr, sizeof(addr))
314 && twi_recv(buf, count);
316 #error Unknown device type
326 * Write a single character \a c at address \a addr.
328 bool eeprom_write_char(e2addr_t addr, char c)
330 return eeprom_write(addr, &c, 1);
335 * Read a single character at address \a addr.
337 * \return the requested character or -1 in case of failure.
339 int eeprom_read_char(e2addr_t addr)
343 if (eeprom_read(addr, &c, 1))
351 * Erase specified part of eeprom, writing 0xFF.
353 * \param addr starting address
354 * \param count length of block to erase
356 void eeprom_erase(e2addr_t addr, size_t count)
358 uint8_t buf[EEPROM_BLKSIZE];
359 memset(buf, 0xFF, sizeof buf);
361 // Clear all but struct hw_info at start of eeprom
364 size_t size = MIN(count, sizeof buf);
365 eeprom_write(addr, buf, size);
373 * Initialize TWI module.
375 void eeprom_init(void)
378 DISABLE_IRQSAVE(flags);
380 #if defined(__AVR_ATmega64__)
381 PORTD |= BV(PD0) | BV(PD1);
382 DDRD |= BV(PD0) | BV(PD1);
383 #elif defined(__AVR_ATmega8__)
384 PORTC |= BV(PC4) | BV(PC5);
385 DDRC |= BV(PC4) | BV(PC5);
387 #error Unsupported architecture
392 * F = CLOCK_FREQ / (16 + 2*TWBR * 4^TWPS)
394 #define TWI_FREQ 300000 /* 300 kHz */
395 #define TWI_PRESC 1 /* 4 ^ TWPS */
397 TWBR = (CLOCK_FREQ / (2 * TWI_FREQ * TWI_PRESC)) - (8 / TWI_PRESC);
401 ENABLE_IRQRESTORE(flags);
409 void eeprom_test(void)
411 static const char magic[13] = "Humpty Dumpty";
412 char buf[sizeof magic + 1];
415 // Write something to EEPROM using unaligned sequential writes
416 for (i = 0; i < 42; ++i)
417 eeprom_write(i * sizeof magic, magic, sizeof magic);
419 // Read back with single-byte reads
420 for (i = 0; i < 42 * sizeof magic; ++i)
422 eeprom_read(i, buf, 1);
423 kprintf("EEPROM byte read: %c (%d)\n", buf[0], buf[0]);
424 ASSERT(buf[0] == magic[i % sizeof magic]);
427 // Read back again using sequential reads
428 for (i = 0; i < 42; ++i)
430 memset(buf, 0, sizeof buf);
431 eeprom_read(i * sizeof magic, buf, sizeof magic);
432 kprintf("EEPROM seq read @ 0x%x: '%s'\n", i * sizeof magic, buf);
433 ASSERT(memcmp(buf, magic, sizeof magic) == 0);