4 * Copyright 2003, 2004 Develer S.r.l. (http://www.develer.com/)
5 * This file is part of DevLib - See devlib/README for information.
8 * \brief Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation)
10 * \note This implementation is AVR specific.
13 * \author Stefano Fedrigo <aleph@develer.com>
14 * \author Bernardo Innocenti <bernie@develer.com>
19 *#* Revision 1.14 2004/12/13 12:07:06 bernie
20 *#* DISABLE_IRQSAVE/ENABLE_IRQRESTORE: Convert to IRQ_SAVE_DISABLE/IRQ_RESTORE.
22 *#* Revision 1.13 2004/11/16 20:58:51 bernie
25 *#* Revision 1.12 2004/11/02 17:50:01 bernie
26 *#* CONFIG_EEPROM_VERIFY: New config option.
28 *#* Revision 1.11 2004/10/26 08:35:31 bernie
29 *#* Reset watchdog for long operations.
31 *#* Revision 1.10 2004/09/20 03:31:22 bernie
34 *#* Revision 1.9 2004/09/14 21:03:46 bernie
35 *#* Use debug.h instead of kdebug.h.
37 *#* Revision 1.8 2004/08/25 14:12:08 rasky
38 *#* Aggiornato il comment block dei log RCS
40 *#* Revision 1.7 2004/08/24 16:48:40 bernie
41 *#* Note reason for including <macros.h>
43 *#* Revision 1.6 2004/08/24 14:27:20 bernie
46 *#* Revision 1.5 2004/08/24 13:46:48 bernie
47 *#* Include <macros.h>.
49 *#* Revision 1.4 2004/08/10 06:57:22 bernie
50 *#* eeprom_erase(): New function.
52 *#* Revision 1.3 2004/07/29 22:57:09 bernie
53 *#* Add 24LC16 support.
55 *#* Revision 1.2 2004/07/22 01:24:43 bernie
56 *#* Document AVR dependency.
58 *#* Revision 1.1 2004/07/20 17:11:18 bernie
59 *#* Import into DevLib.
66 #include <mware/byteorder.h> /* cpu_to_be16() */
69 #include <cpu.h> // IRQ_SAVE_DISABLE(), IRQ_RESTORE()
70 #include <config.h> // CONFIG_EEPROM_VERIFY
71 #include <macros.h> // MIN()
73 #include <string.h> // memset()
77 // Configuration sanity checks
78 #if !defined(CONFIG_EEPROM_VERIFY) || (CONFIG_EEPROM_VERIFY != 0 && CONFIG_EEPROM_VERIFY != 1)
79 #error CONFIG_EEPROM_VERIFY must be defined to either 0 or 1
83 /* Wait for TWINT flag set: bus is ready */
84 #define WAIT_TWI_READY do {} while (!(TWCR & BV(TWINT)))
86 /*! \name EEPROM control codes */
94 * Send START condition on the bus.
96 * \return true on success, false otherwise.
98 static bool twi_start(void)
100 TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN);
103 if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START)
106 DB(kprintf("!TW_(REP)START: %x\n", TWSR);)
112 * Send START condition and select slave for write.
114 * \return true on success, false otherwise.
116 static bool twi_start_w(uint8_t slave_addr)
118 ASSERT(slave_addr < 8);
121 * Loop on the select write sequence: when the eeprom is busy
122 * writing previously sent data it will reply to the SLA_W
123 * control byte with a NACK. In this case, we must
124 * keep trying until the eeprom responds with an ACK.
128 TWDR = SLA_W | (slave_addr << 1);
129 TWCR = BV(TWINT) | BV(TWEN);
132 if (TW_STATUS == TW_MT_SLA_ACK)
134 else if (TW_STATUS != TW_MT_SLA_NACK)
136 DB(kprintf("!TW_MT_SLA_(N)ACK: %x\n", TWSR);)
146 * Send START condition and select slave for read.
148 * \return true on success, false otherwise.
150 static bool twi_start_r(uint8_t slave_addr)
152 ASSERT(slave_addr < 8);
156 TWDR = SLA_R | (slave_addr << 1);
157 TWCR = BV(TWINT) | BV(TWEN);
160 if (TW_STATUS == TW_MR_SLA_ACK)
163 DB(kprintf("!TW_MR_SLA_ACK: %x\n", TWSR);)
171 * Send STOP condition.
173 static void twi_stop(void)
175 TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO);
180 * Send a sequence of bytes in master transmitter mode
181 * to the selected slave device through the TWI bus.
183 * \return true on success, false on error.
185 static bool twi_send(const void *_buf, size_t count)
187 const uint8_t *buf = (const uint8_t *)_buf;
192 TWCR = BV(TWINT) | BV(TWEN);
194 if (TW_STATUS != TW_MT_DATA_ACK)
196 DB(kprintf("!TW_MT_DATA_ACK: %x\n", TWSR);)
206 * Receive a sequence of one or more bytes from the
207 * selected slave device in master receive mode through
210 * Received data is placed in \c buf.
212 * \return true on success, false on error
214 static bool twi_recv(void *_buf, size_t count)
216 uint8_t *buf = (uint8_t *)_buf;
219 * When reading the last byte the TWEA bit is not
220 * set, and the eeprom should answer with NACK
224 TWCR = BV(TWINT) | BV(TWEN) | (count ? BV(TWEA) : 0);
229 if (TW_STATUS != TW_MR_DATA_ACK)
231 DB(kprintf("!TW_MR_DATA_ACK: %x\n", TWSR);)
237 if (TW_STATUS != TW_MR_DATA_NACK)
239 DB(kprintf("!TW_MR_DATA_NACK: %x\n", TWSR);)
250 * Copy \c count bytes from buffer \c buf to
251 * eeprom at address \c addr.
253 static bool eeprom_writeRaw(e2addr_t addr, const void *buf, size_t count)
256 ASSERT(addr + count <= EEPROM_SIZE);
258 while (count && result)
261 * Split write in multiple sequential mode operations that
262 * don't cross page boundaries.
265 MIN(count, (size_t)(EEPROM_BLKSIZE - (addr & (EEPROM_BLKSIZE - 1))));
267 #if CONFIG_EEPROM_TYPE == EEPROM_24XX16
269 * The 24LC16 uses the slave address as a 3-bit
272 uint8_t blk_addr = (uint8_t)((addr >> 8) & 0x07);
273 uint8_t blk_offs = (uint8_t)addr;
276 twi_start_w(blk_addr)
277 && twi_send(&blk_offs, sizeof blk_offs)
278 && twi_send(buf, size);
280 #elif CONFIG_EEPROM_TYPE == EEPROM_24XX256
282 // 24LC256 wants big-endian addresses
283 uint16_t addr_be = cpu_to_be16(addr);
287 && twi_send((uint8_t *)&addr_be, sizeof addr_be)
288 && twi_send(buf, size);
291 #error Unknown device type
297 //kprintf("addr=%d, count=%d, size=%d, *#?=%d\n",
298 // addr, count, size,
299 // (EEPROM_BLKSIZE - (addr & (EEPROM_BLKSIZE - 1)))
302 /* Update count and addr for next operation */
305 buf = ((const char *)buf) + size;
309 TRACEMSG("Write error!");
314 #if CONFIG_EEPROM_VERIFY
316 * Check that the contents of an EEPROM range
317 * match with a provided data buffer.
319 * \return true on success.
321 static bool eeprom_verify(e2addr_t addr, const void *buf, size_t count)
323 uint8_t verify_buf[16];
326 while (count && result)
328 /* Split read in smaller pieces */
329 size_t size = MIN(count, sizeof verify_buf);
331 /* Read back buffer */
332 if (eeprom_read(addr, verify_buf, size))
334 if (memcmp(buf, verify_buf, size) != 0)
336 TRACEMSG("Data mismatch!");
342 TRACEMSG("Read error!");
346 /* Update count and addr for next operation */
349 buf = ((const char *)buf) + size;
354 #endif /* CONFIG_EEPROM_VERIFY */
357 bool eeprom_write(e2addr_t addr, const void *buf, size_t count)
359 #if CONFIG_EEPROM_VERIFY
363 if (eeprom_writeRaw(addr, buf, count)
364 && eeprom_verify(addr, buf, count))
369 #else /* !CONFIG_EEPROM_VERIFY */
370 return eeprom_writeRaw(addr, buf, count);
371 #endif /* !CONFIG_EEPROM_VERIFY */
376 * Copy \c count bytes at address \c addr
377 * from eeprom to RAM to buffer \c buf.
379 * \return true on success.
381 bool eeprom_read(e2addr_t addr, void *buf, size_t count)
383 ASSERT(addr + count <= EEPROM_SIZE);
385 #if CONFIG_EEPROM_TYPE == EEPROM_24XX16
387 * The 24LC16 uses the slave address as a 3-bit
390 uint8_t blk_addr = (uint8_t)((addr >> 8) & 0x07);
391 uint8_t blk_offs = (uint8_t)addr;
394 twi_start_w(blk_addr)
395 && twi_send(&blk_offs, sizeof blk_offs)
396 && twi_start_r(blk_addr)
397 && twi_recv(buf, count);
399 #elif CONFIG_EEPROM_TYPE == EEPROM_24XX256
401 // 24LC256 wants big-endian addresses
402 addr = cpu_to_be16(addr);
406 && twi_send((uint8_t *)&addr, sizeof(addr))
408 && twi_recv(buf, count);
410 #error Unknown device type
416 TRACEMSG("Read error!");
422 * Write a single character \a c at address \a addr.
424 bool eeprom_write_char(e2addr_t addr, char c)
426 return eeprom_write(addr, &c, 1);
431 * Read a single character at address \a addr.
433 * \return the requested character or -1 in case of failure.
435 int eeprom_read_char(e2addr_t addr)
439 if (eeprom_read(addr, &c, 1))
447 * Erase specified part of eeprom, writing 0xFF.
449 * \param addr starting address
450 * \param count length of block to erase
452 void eeprom_erase(e2addr_t addr, size_t count)
454 uint8_t buf[EEPROM_BLKSIZE];
455 memset(buf, 0xFF, sizeof buf);
457 // Clear all but struct hw_info at start of eeprom
460 // Long operation, reset watchdog
463 size_t size = MIN(count, sizeof buf);
464 eeprom_write(addr, buf, size);
472 * Initialize TWI module.
474 void eeprom_init(void)
477 IRQ_SAVE_DISABLE(flags);
480 * This is pretty useless according to AVR's datasheet,
481 * but it helps us driving the TWI data lines on boards
482 * where the bus pull-up resistors are missing. This is
483 * probably due to some unwanted interaction between the
484 * port pin and the TWI lines.
486 #if defined(__AVR_ATmega64__)
487 PORTD |= BV(PD0) | BV(PD1);
488 DDRD |= BV(PD0) | BV(PD1);
489 #elif defined(__AVR_ATmega8__)
490 PORTC |= BV(PC4) | BV(PC5);
491 DDRC |= BV(PC4) | BV(PC5);
493 #error Unsupported architecture
498 * F = CLOCK_FREQ / (16 + 2*TWBR * 4^TWPS)
500 #define TWI_FREQ 100000 /* ~100 kHz */
501 #define TWI_PRESC 1 /* 4 ^ TWPS */
503 TWBR = (CLOCK_FREQ / (2 * TWI_FREQ * TWI_PRESC)) - (8 / TWI_PRESC);
515 void eeprom_test(void)
517 static const char magic[14] = "Humpty Dumpty";
518 char buf[sizeof magic];
521 // Write something to EEPROM using unaligned sequential writes
522 for (i = 0; i < 42; ++i)
523 eeprom_write(i * sizeof magic, magic, sizeof magic);
525 // Read back with single-byte reads
526 for (i = 0; i < 42 * sizeof magic; ++i)
528 eeprom_read(i, buf, 1);
529 kprintf("EEPROM byte read: %c (%d)\n", buf[0], buf[0]);
530 ASSERT(buf[0] == magic[i % sizeof magic]);
533 // Read back again using sequential reads
534 for (i = 0; i < 42; ++i)
536 memset(buf, 0, sizeof buf);
537 eeprom_read(i * sizeof magic, buf, sizeof magic);
538 kprintf("EEPROM seq read @ 0x%x: '%s'\n", i * sizeof magic, buf);
539 ASSERT(memcmp(buf, magic, sizeof magic) == 0);