4 * Copyright 2003, 2004 Develer S.r.l. (http://www.develer.com/)
5 * This file is part of DevLib - See devlib/README for information.
8 * \brief Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation)
10 * \note This implementation is AVR specific.
13 * \author Stefano Fedrigo <aleph@develer.com>
14 * \author Bernardo Innocenti <bernie@develer.com>
19 *#* Revision 1.13 2004/11/16 20:58:51 bernie
22 *#* Revision 1.12 2004/11/02 17:50:01 bernie
23 *#* CONFIG_EEPROM_VERIFY: New config option.
25 *#* Revision 1.11 2004/10/26 08:35:31 bernie
26 *#* Reset watchdog for long operations.
28 *#* Revision 1.10 2004/09/20 03:31:22 bernie
31 *#* Revision 1.9 2004/09/14 21:03:46 bernie
32 *#* Use debug.h instead of kdebug.h.
34 *#* Revision 1.8 2004/08/25 14:12:08 rasky
35 *#* Aggiornato il comment block dei log RCS
37 *#* Revision 1.7 2004/08/24 16:48:40 bernie
38 *#* Note reason for including <macros.h>
40 *#* Revision 1.6 2004/08/24 14:27:20 bernie
43 *#* Revision 1.5 2004/08/24 13:46:48 bernie
44 *#* Include <macros.h>.
46 *#* Revision 1.4 2004/08/10 06:57:22 bernie
47 *#* eeprom_erase(): New function.
49 *#* Revision 1.3 2004/07/29 22:57:09 bernie
50 *#* Add 24LC16 support.
52 *#* Revision 1.2 2004/07/22 01:24:43 bernie
53 *#* Document AVR dependency.
55 *#* Revision 1.1 2004/07/20 17:11:18 bernie
56 *#* Import into DevLib.
63 #include <mware/byteorder.h> /* cpu_to_be16() */
66 #include <config.h> // CONFIG_EEPROM_VERIFY
67 #include <macros.h> // MIN()
69 #include <string.h> // memset()
73 // Configuration sanity checks
74 #if !defined(CONFIG_EEPROM_VERIFY) || (CONFIG_EEPROM_VERIFY != 0 && CONFIG_EEPROM_VERIFY != 1)
75 #error CONFIG_EEPROM_VERIFY must be defined to either 0 or 1
79 /* Wait for TWINT flag set: bus is ready */
80 #define WAIT_TWI_READY do {} while (!(TWCR & BV(TWINT)))
82 /*! \name EEPROM control codes */
90 * Send START condition on the bus.
92 * \return true on success, false otherwise.
94 static bool twi_start(void)
96 TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN);
99 if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START)
102 DB(kprintf("!TW_(REP)START: %x\n", TWSR);)
108 * Send START condition and select slave for write.
110 * \return true on success, false otherwise.
112 static bool twi_start_w(uint8_t slave_addr)
114 ASSERT(slave_addr < 8);
117 * Loop on the select write sequence: when the eeprom is busy
118 * writing previously sent data it will reply to the SLA_W
119 * control byte with a NACK. In this case, we must
120 * keep trying until the eeprom responds with an ACK.
124 TWDR = SLA_W | (slave_addr << 1);
125 TWCR = BV(TWINT) | BV(TWEN);
128 if (TW_STATUS == TW_MT_SLA_ACK)
130 else if (TW_STATUS != TW_MT_SLA_NACK)
132 DB(kprintf("!TW_MT_SLA_(N)ACK: %x\n", TWSR);)
142 * Send START condition and select slave for read.
144 * \return true on success, false otherwise.
146 static bool twi_start_r(uint8_t slave_addr)
148 ASSERT(slave_addr < 8);
152 TWDR = SLA_R | (slave_addr << 1);
153 TWCR = BV(TWINT) | BV(TWEN);
156 if (TW_STATUS == TW_MR_SLA_ACK)
159 DB(kprintf("!TW_MR_SLA_ACK: %x\n", TWSR);)
167 * Send STOP condition.
169 static void twi_stop(void)
171 TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO);
176 * Send a sequence of bytes in master transmitter mode
177 * to the selected slave device through the TWI bus.
179 * \return true on success, false on error.
181 static bool twi_send(const void *_buf, size_t count)
183 const uint8_t *buf = (const uint8_t *)_buf;
188 TWCR = BV(TWINT) | BV(TWEN);
190 if (TW_STATUS != TW_MT_DATA_ACK)
192 DB(kprintf("!TW_MT_DATA_ACK: %x\n", TWSR);)
202 * Receive a sequence of one or more bytes from the
203 * selected slave device in master receive mode through
206 * Received data is placed in \c buf.
208 * \return true on success, false on error
210 static bool twi_recv(void *_buf, size_t count)
212 uint8_t *buf = (uint8_t *)_buf;
215 * When reading the last byte the TWEA bit is not
216 * set, and the eeprom should answer with NACK
220 TWCR = BV(TWINT) | BV(TWEN) | (count ? BV(TWEA) : 0);
225 if (TW_STATUS != TW_MR_DATA_ACK)
227 DB(kprintf("!TW_MR_DATA_ACK: %x\n", TWSR);)
233 if (TW_STATUS != TW_MR_DATA_NACK)
235 DB(kprintf("!TW_MR_DATA_NACK: %x\n", TWSR);)
246 * Copy \c count bytes from buffer \c buf to
247 * eeprom at address \c addr.
249 static bool eeprom_writeRaw(e2addr_t addr, const void *buf, size_t count)
252 ASSERT(addr + count <= EEPROM_SIZE);
254 while (count && result)
257 * Split write in multiple sequential mode operations that
258 * don't cross page boundaries.
261 MIN(count, (size_t)(EEPROM_BLKSIZE - (addr & (EEPROM_BLKSIZE - 1))));
263 #if CONFIG_EEPROM_TYPE == EEPROM_24XX16
265 * The 24LC16 uses the slave address as a 3-bit
268 uint8_t blk_addr = (uint8_t)((addr >> 8) & 0x07);
269 uint8_t blk_offs = (uint8_t)addr;
272 twi_start_w(blk_addr)
273 && twi_send(&blk_offs, sizeof blk_offs)
274 && twi_send(buf, size);
276 #elif CONFIG_EEPROM_TYPE == EEPROM_24XX256
278 // 24LC256 wants big-endian addresses
279 uint16_t addr_be = cpu_to_be16(addr);
283 && twi_send((uint8_t *)&addr_be, sizeof addr_be)
284 && twi_send(buf, size);
287 #error Unknown device type
293 //kprintf("addr=%d, count=%d, size=%d, *#?=%d\n",
294 // addr, count, size,
295 // (EEPROM_BLKSIZE - (addr & (EEPROM_BLKSIZE - 1)))
298 /* Update count and addr for next operation */
301 buf = ((const char *)buf) + size;
305 TRACEMSG("Write error!");
310 #if CONFIG_EEPROM_VERIFY
312 * Check that the contents of an EEPROM range
313 * match with a provided data buffer.
315 * \return true on success.
317 static bool eeprom_verify(e2addr_t addr, const void *buf, size_t count)
319 uint8_t verify_buf[16];
322 while (count && result)
324 /* Split read in smaller pieces */
325 size_t size = MIN(count, sizeof verify_buf);
327 /* Read back buffer */
328 if (eeprom_read(addr, verify_buf, size))
330 if (memcmp(buf, verify_buf, size) != 0)
332 TRACEMSG("Data mismatch!");
338 TRACEMSG("Read error!");
342 /* Update count and addr for next operation */
345 buf = ((const char *)buf) + size;
350 #endif /* CONFIG_EEPROM_VERIFY */
353 bool eeprom_write(e2addr_t addr, const void *buf, size_t count)
355 #if CONFIG_EEPROM_VERIFY
359 if (eeprom_writeRaw(addr, buf, count)
360 && eeprom_verify(addr, buf, count))
365 #else /* !CONFIG_EEPROM_VERIFY */
366 return eeprom_writeRaw(addr, buf, count);
367 #endif /* !CONFIG_EEPROM_VERIFY */
372 * Copy \c count bytes at address \c addr
373 * from eeprom to RAM to buffer \c buf.
375 * \return true on success.
377 bool eeprom_read(e2addr_t addr, void *buf, size_t count)
379 ASSERT(addr + count <= EEPROM_SIZE);
381 #if CONFIG_EEPROM_TYPE == EEPROM_24XX16
383 * The 24LC16 uses the slave address as a 3-bit
386 uint8_t blk_addr = (uint8_t)((addr >> 8) & 0x07);
387 uint8_t blk_offs = (uint8_t)addr;
390 twi_start_w(blk_addr)
391 && twi_send(&blk_offs, sizeof blk_offs)
392 && twi_start_r(blk_addr)
393 && twi_recv(buf, count);
395 #elif CONFIG_EEPROM_TYPE == EEPROM_24XX256
397 // 24LC256 wants big-endian addresses
398 addr = cpu_to_be16(addr);
402 && twi_send((uint8_t *)&addr, sizeof(addr))
404 && twi_recv(buf, count);
406 #error Unknown device type
412 TRACEMSG("Read error!");
418 * Write a single character \a c at address \a addr.
420 bool eeprom_write_char(e2addr_t addr, char c)
422 return eeprom_write(addr, &c, 1);
427 * Read a single character at address \a addr.
429 * \return the requested character or -1 in case of failure.
431 int eeprom_read_char(e2addr_t addr)
435 if (eeprom_read(addr, &c, 1))
443 * Erase specified part of eeprom, writing 0xFF.
445 * \param addr starting address
446 * \param count length of block to erase
448 void eeprom_erase(e2addr_t addr, size_t count)
450 uint8_t buf[EEPROM_BLKSIZE];
451 memset(buf, 0xFF, sizeof buf);
453 // Clear all but struct hw_info at start of eeprom
456 // Long operation, reset watchdog
459 size_t size = MIN(count, sizeof buf);
460 eeprom_write(addr, buf, size);
468 * Initialize TWI module.
470 void eeprom_init(void)
473 DISABLE_IRQSAVE(flags);
476 * This is pretty useless according to AVR's datasheet,
477 * but it helps us driving the TWI data lines on boards
478 * where the bus pull-up resistors are missing. This is
479 * probably due to some unwanted interaction between the
480 * port pin and the TWI lines.
482 #if defined(__AVR_ATmega64__)
483 PORTD |= BV(PD0) | BV(PD1);
484 DDRD |= BV(PD0) | BV(PD1);
485 #elif defined(__AVR_ATmega8__)
486 PORTC |= BV(PC4) | BV(PC5);
487 DDRC |= BV(PC4) | BV(PC5);
489 #error Unsupported architecture
494 * F = CLOCK_FREQ / (16 + 2*TWBR * 4^TWPS)
496 #define TWI_FREQ 100000 /* ~100 kHz */
497 #define TWI_PRESC 1 /* 4 ^ TWPS */
499 TWBR = (CLOCK_FREQ / (2 * TWI_FREQ * TWI_PRESC)) - (8 / TWI_PRESC);
503 ENABLE_IRQRESTORE(flags);
511 void eeprom_test(void)
513 static const char magic[14] = "Humpty Dumpty";
514 char buf[sizeof magic];
517 // Write something to EEPROM using unaligned sequential writes
518 for (i = 0; i < 42; ++i)
519 eeprom_write(i * sizeof magic, magic, sizeof magic);
521 // Read back with single-byte reads
522 for (i = 0; i < 42 * sizeof magic; ++i)
524 eeprom_read(i, buf, 1);
525 kprintf("EEPROM byte read: %c (%d)\n", buf[0], buf[0]);
526 ASSERT(buf[0] == magic[i % sizeof magic]);
529 // Read back again using sequential reads
530 for (i = 0; i < 42; ++i)
532 memset(buf, 0, sizeof buf);
533 eeprom_read(i * sizeof magic, buf, sizeof magic);
534 kprintf("EEPROM seq read @ 0x%x: '%s'\n", i * sizeof magic, buf);
535 ASSERT(memcmp(buf, magic, sizeof magic) == 0);