4 * Copyright 2003, 2004 Develer S.r.l. (http://www.develer.com/)
10 * \author Stefano Fedrigo <aleph@develer.com>
11 * \author Bernardo Innocenti <bernie@develer.com>
13 * \brief Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation)
15 * \note This implementation is AVR specific.
20 * Revision 1.7 2004/08/24 16:48:40 bernie
21 * Note reason for including <macros.h>
23 * Revision 1.6 2004/08/24 14:27:20 bernie
26 * Revision 1.5 2004/08/24 13:46:48 bernie
29 * Revision 1.4 2004/08/10 06:57:22 bernie
30 * eeprom_erase(): New function.
32 * Revision 1.3 2004/07/29 22:57:09 bernie
35 * Revision 1.2 2004/07/22 01:24:43 bernie
36 * Document AVR dependency.
38 * Revision 1.1 2004/07/20 17:11:18 bernie
45 #include <mware/byteorder.h> /* cpu_to_be16() */
46 #include <drv/kdebug.h>
48 #include <macros.h> // MIN()
50 #include <string.h> // memset()
55 /* Wait for TWINT flag set: bus is ready */
56 #define WAIT_TWI_READY do {} while (!(TWCR & BV(TWINT)))
58 /*! \name EEPROM control codes */
66 * Send START condition on the bus.
68 * \return true on success, false otherwise.
70 static bool twi_start(void)
72 TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN);
75 if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START)
78 DB(kprintf("!TW_(REP)START: %x\n", TWSR);)
84 * Send START condition and select slave for write.
86 * \return true on success, false otherwise.
88 static bool twi_start_w(uint8_t slave_addr)
90 ASSERT(slave_addr < 8);
93 * Loop on the select write sequence: when the eeprom is busy
94 * writing previously sent data it will reply to the SLA_W
95 * control byte with a NACK. In this case, we must
96 * keep trying until the eeprom responds with an ACK.
100 TWDR = SLA_W | (slave_addr << 1);
101 TWCR = BV(TWINT) | BV(TWEN);
104 if (TW_STATUS == TW_MT_SLA_ACK)
106 else if (TW_STATUS != TW_MT_SLA_NACK)
108 DB(kprintf("!TW_MT_SLA_(N)ACK: %x\n", TWSR);)
118 * Send START condition and select slave for read.
120 * \return true on success, false otherwise.
122 static bool twi_start_r(uint8_t slave_addr)
124 ASSERT(slave_addr < 8);
128 TWDR = SLA_R | (slave_addr << 1);
129 TWCR = BV(TWINT) | BV(TWEN);
132 if (TW_STATUS == TW_MR_SLA_ACK)
135 DB(kprintf("!TW_MR_SLA_ACK: %x\n", TWSR);)
143 * Send STOP condition.
145 static void twi_stop(void)
147 TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO);
152 * Send a sequence of bytes in master transmitter mode
153 * to the selected slave device through the TWI bus.
155 * \return true on success, false on error.
157 static bool twi_send(const uint8_t *buf, size_t count)
162 TWCR = BV(TWINT) | BV(TWEN);
164 if (TW_STATUS != TW_MT_DATA_ACK)
166 DB(kprintf("!TW_MT_DATA_ACK: %x\n", TWSR);)
176 * Receive a sequence of one or more bytes from the
177 * selected slave device in master receive mode through
180 * Received data is placed in \c buf.
182 * \return true on success, false on error
184 static bool twi_recv(uint8_t *buf, size_t count)
187 * When reading the last byte the TWEA bit is not
188 * set, and the eeprom should answer with NACK
192 TWCR = BV(TWINT) | BV(TWEN) | (count ? BV(TWEA) : 0);
197 if (TW_STATUS != TW_MR_DATA_ACK)
199 DB(kprintf("!TW_MR_DATA_ACK: %x\n", TWSR);)
205 if (TW_STATUS != TW_MR_DATA_NACK)
207 DB(kprintf("!TW_MR_DATA_NACK: %x\n", TWSR);)
218 * Copy \c count bytes from buffer \c buf to
219 * eeprom at address \c addr.
221 bool eeprom_write(e2addr_t addr, const void *buf, size_t count)
224 ASSERT(addr + count <= EEPROM_SIZE);
226 while (count && result)
229 * Split write in multiple sequential mode operations that
230 * don't cross page boundaries.
233 MIN(count, (size_t)(EEPROM_BLKSIZE - (addr & (EEPROM_BLKSIZE - 1))));
235 #if CONFIG_EEPROM_TYPE == EEPROM_24XX16
237 * The 24LC16 uses the slave address as a 3-bit
240 uint8_t blk_addr = (uint8_t)((addr >> 8) & 0x07);
241 uint8_t blk_offs = (uint8_t)addr;
244 twi_start_w(blk_addr)
245 && twi_send(&blk_offs, sizeof blk_offs)
246 && twi_send(buf, size);
248 #elif CONFIG_EEPROM_TYPE == EEPROM_24XX256
250 // 24LC256 wants big-endian addresses
251 uint16_t addr_be = cpu_to_be16(addr);
255 && twi_send((uint8_t *)&addr_be, sizeof addr_be)
256 && twi_send(buf, size);
259 #error Unknown device type
265 //kprintf("addr=%d, count=%d, size=%d, *#?=%d\n",
266 // addr, count, size,
267 // (EEPROM_BLKSIZE - (addr & (EEPROM_BLKSIZE - 1)))
270 /* Update count and addr for next operation */
273 buf = ((const char *)buf) + size;
281 * Copy \c count bytes at address \c addr
282 * from eeprom to RAM to buffer \c buf.
284 bool eeprom_read(e2addr_t addr, void *buf, size_t count)
286 ASSERT(addr + count <= EEPROM_SIZE);
288 #if CONFIG_EEPROM_TYPE == EEPROM_24XX16
290 * The 24LC16 uses the slave address as a 3-bit
293 uint8_t blk_addr = (uint8_t)((addr >> 8) & 0x07);
294 uint8_t blk_offs = (uint8_t)addr;
297 twi_start_w(blk_addr)
298 && twi_send(&blk_offs, sizeof blk_offs)
299 && twi_start_r(blk_addr)
300 && twi_recv(buf, count);
302 #elif CONFIG_EEPROM_TYPE == EEPROM_24XX256
304 // 24LC256 wants big-endian addresses
305 addr = cpu_to_be16(addr);
309 && twi_send((uint8_t *)&addr, sizeof(addr))
311 && twi_recv(buf, count);
313 #error Unknown device type
323 * Write a single character \a c at address \a addr.
325 bool eeprom_write_char(e2addr_t addr, char c)
327 return eeprom_write(addr, &c, 1);
332 * Read a single character at address \a addr.
334 * \return the requested character or -1 in case of failure.
336 int eeprom_read_char(e2addr_t addr)
340 if (eeprom_read(addr, &c, 1))
348 * Erase specified part of eeprom, writing 0xFF.
350 * \param addr starting address
351 * \param count length of block to erase
353 void eeprom_erase(e2addr_t addr, size_t count)
355 uint8_t buf[EEPROM_BLKSIZE];
356 memset(buf, 0xFF, sizeof buf);
358 // Clear all but struct hw_info at start of eeprom
361 size_t size = MIN(count, sizeof buf);
362 eeprom_write(addr, buf, size);
370 * Initialize TWI module.
372 void eeprom_init(void)
375 DISABLE_IRQSAVE(flags);
377 #if defined(__AVR_ATmega64__)
378 PORTD |= BV(PD0) | BV(PD1);
379 DDRD |= BV(PD0) | BV(PD1);
380 #elif defined(__AVR_ATmega8__)
381 PORTC |= BV(PC4) | BV(PC5);
382 DDRC |= BV(PC4) | BV(PC5);
384 #error Unsupported architecture
389 * F = CLOCK_FREQ / (16 + 2*TWBR * 4^TWPS)
391 #define TWI_FREQ 300000 /* 300 kHz */
392 #define TWI_PRESC 1 /* 4 ^ TWPS */
394 TWBR = (CLOCK_FREQ / (2 * TWI_FREQ * TWI_PRESC)) - (8 / TWI_PRESC);
398 ENABLE_IRQRESTORE(flags);
406 void eeprom_test(void)
408 static const char magic[13] = "Humpty Dumpty";
409 char buf[sizeof magic + 1];
412 // Write something to EEPROM using unaligned sequential writes
413 for (i = 0; i < 42; ++i)
414 eeprom_write(i * sizeof magic, magic, sizeof magic);
416 // Read back with single-byte reads
417 for (i = 0; i < 42 * sizeof magic; ++i)
419 eeprom_read(i, buf, 1);
420 kprintf("EEPROM byte read: %c (%d)\n", buf[0], buf[0]);
421 ASSERT(buf[0] == magic[i % sizeof magic]);
424 // Read back again using sequential reads
425 for (i = 0; i < 42; ++i)
427 memset(buf, 0, sizeof buf);
428 eeprom_read(i * sizeof magic, buf, sizeof magic);
429 kprintf("EEPROM seq read @ 0x%x: '%s'\n", i * sizeof magic, buf);
430 ASSERT(memcmp(buf, magic, sizeof magic) == 0);