4 * Copyright 2003, 2004, 2005, 2006 Develer S.r.l. (http://www.develer.com/)
5 * Copyright 2001 Bernardo Innocenti <bernie@codewiz.org>
6 * This file is part of DevLib - See README.devlib for information.
11 * \author Bernardo Innocenti <bernie@develer.com>
12 * \author Stefano Fedrigo <aleph@develer.com>
14 * \brief Displaytech 32122A LCD driver
19 *#* Revision 1.1 2006/01/16 03:50:57 bernie
20 *#* Import into DevLib.
26 #include <drv/timer.h>
30 #include <cfg/macros.h> /* BV() */
31 #include <cfg/debug.h>
37 #ifdef CONFIG_LCD_SOFTINT_REFRESH
39 /*! Interval between softint driven lcd refresh */
40 # define LCD_REFRESH_INTERVAL 20 /* 20ms -> 50fps */
42 #endif /* CONFIG_LCD_SOFTINT_REFRESH */
44 /*! Number of LCD pages */
47 /*! Width of an LCD page */
48 #define LCD_PAGESIZE (LCD_WIDTH / 2)
51 * \name LCD I/O pins/ports
54 #define LCD_PF_DB0 PF4
55 #define LCD_PF_DB1 PF5
56 #define LCD_PF_DB2 PF6
57 #define LCD_PF_DB3 PF7
58 #define LCD_PD_DB4 PD4
59 #define LCD_PD_DB5 PD5
60 #define LCD_PD_DB6 PD6
61 #define LCD_PD_DB7 PD7
69 * \name DB high nibble (DB[4-7])
72 #define LCD_DATA_HI_PORT PORTD
73 #define LCD_DATA_HI_PIN PIND
74 #define LCD_DATA_HI_DDR DDRD
75 #define LCD_DATA_HI_SHIFT 0
76 #define LCD_DATA_HI_MASK 0xF0
80 * \name DB low nibble (DB[0-3])
83 #define LCD_DATA_LO_PORT PORTF
84 #define LCD_DATA_LO_PIN PINF
85 #define LCD_DATA_LO_DDR DDRF
86 #define LCD_DATA_LO_SHIFT 4
87 #define LCD_DATA_LO_MASK 0xF0
91 * \name LCD bus control macros
94 #define LCD_CLR_A0 (PORTB &= ~BV(LCD_PB_A0))
95 #define LCD_SET_A0 (PORTB |= BV(LCD_PB_A0))
96 #define LCD_CLR_RD (PORTE &= ~BV(LCD_PE_RW))
97 #define LCD_SET_RD (PORTE |= BV(LCD_PE_RW))
98 #define LCD_CLR_E1 (PORTE &= ~BV(LCD_PE_E1))
99 #define LCD_SET_E1 (PORTE |= BV(LCD_PE_E1))
100 #define LCD_CLR_E2 (PORTE &= ~BV(LCD_PE_E2))
101 #define LCD_SET_E2 (PORTE |= BV(LCD_PE_E2))
102 #define LCD_SET_E(x) (PORTE |= (x))
103 #define LCD_CLR_E(x) (PORTE &= ~(x))
107 * \name Chip select bits for LCD_SET_E()
110 #define LCDF_E1 (BV(LCD_PE_E1))
111 #define LCDF_E2 (BV(LCD_PE_E2))
114 /*! Read from the LCD data bus (DB[0-7]) */
116 ((LCD_DATA_LO_PIN & LCD_DATA_LO_MASK) >> LCD_DATA_LO_SHIFT) | \
117 ((LCD_DATA_HI_PIN & LCD_DATA_HI_MASK) >> LCD_DATA_HI_SHIFT) \
120 /*! Write to the LCD data bus (DB[0-7]) */
121 #define LCD_WRITE(d) \
123 LCD_DATA_LO_PORT = (LCD_DATA_LO_PORT & ~LCD_DATA_LO_MASK) | (((d)<<LCD_DATA_LO_SHIFT) & LCD_DATA_LO_MASK); \
124 LCD_DATA_HI_PORT = (LCD_DATA_HI_PORT & ~LCD_DATA_HI_MASK) | (((d)<<LCD_DATA_HI_SHIFT) & LCD_DATA_HI_MASK); \
127 /*! Set data bus direction to output (write to display) */
130 LCD_DATA_LO_DDR |= LCD_DATA_LO_MASK; \
131 LCD_DATA_HI_DDR |= LCD_DATA_HI_MASK; \
134 /*! Set data bus direction to input (read from display) */
137 LCD_DATA_LO_DDR &= ~LCD_DATA_LO_MASK; \
138 LCD_DATA_HI_DDR &= ~LCD_DATA_HI_MASK; \
141 /*! Delay for tEW (160ns) */
142 #define LCD_DELAY_WRITE \
148 /*! Delay for tACC6 (180ns) */
149 #define LCD_DELAY_READ \
158 * \name 32122A Commands
161 #define LCD_CMD_DISPLAY_ON 0xAF
162 #define LCD_CMD_DISPLAY_OFF 0xAE
163 #define LCD_CMD_STARTLINE 0xC0
164 #define LCD_CMD_PAGEADDR 0xB8
165 #define LCD_CMD_COLADDR 0x00
166 #define LCD_CMD_ADC_LEFT 0xA1
167 #define LCD_CMD_ADC_RIGHT 0xA0
168 #define LCD_CMD_STATIC_OFF 0xA4
169 #define LCD_CMD_STATIC_ON 0xA5
170 #define LCD_CMD_DUTY_32 0xA9
171 #define LCD_CMD_DUTY_16 0xA8
172 #define LCD_CMD_RMW_ON 0xE0
173 #define LCD_CMD_RMW_OFF 0xEE
174 #define LCD_CMD_RESET 0xE2
178 #define LCDF_BUSY BV(7)
180 #ifdef CONFIG_LCD_WAIT
184 * RS __\____________/__
207 } while (status & LCDF_BUSY); \
211 #else /* CONFIG_LCD_WAIT */
213 #define WAIT_LCD do {} while(0)
215 #endif /* CONFIG_LCD_WAIT */
219 * Raster buffer to draw into.
221 * Bits in the bitmap bytes have vertical orientation,
222 * as required by the LCD driver.
224 DECLARE_WALL(wall_before_raster, WALL_SIZE)
225 static uint8_t lcd_raster[LCD_WIDTH * ((LCD_HEIGHT + 7) / 8)];
226 DECLARE_WALL(wall_after_raster, WALL_SIZE)
228 /*! Default LCD bitmap */
229 struct Bitmap lcd_bitmap;
232 #ifdef CONFIG_LCD_SOFTINT_REFRESH
234 /*! Timer for regular LCD refresh */
235 static Timer *lcd_refresh_timer;
237 #endif /* CONFIG_LCD_SOFTINT_REFRESH */
241 static bool lcd_check(void)
244 uint16_t retries = 32768;
248 cbi(PORTC, PCB_LCD_RS);
249 sbi(PORTC, PCB_LCD_RW);
250 sbi(PORTC, PCB_LCD_E);
254 cbi(PORTC, PCB_LCD_E);
255 cbi(PORTC, PCB_LCD_RW);
256 } while ((status & LCDF_BUSY) && retries);
258 return (retries != 0);
263 static inline void lcd_cmd(uint8_t cmd, uint8_t chip)
268 * A0 __\____________/__
270 * R/W __________________
274 * DATA --<============>--
287 static inline uint8_t lcd_read(uint8_t chip)
302 * DATA -------<=====>----
321 static inline void lcd_write(uint8_t c, uint8_t chip)
330 * R/W __________________
334 * DATA -<==============>-
350 * Set LCD contrast PWM.
352 void lcd_setpwm(int duty)
354 ASSERT(duty >= LCD_MIN_PWM);
355 ASSERT(duty <= LCD_MAX_PWM);
361 static void lcd_clear(void)
365 for (page = 0; page < LCD_PAGES; ++page)
367 lcd_cmd(LCD_CMD_COLADDR | 0, LCDF_E1 | LCDF_E2);
368 lcd_cmd(LCD_CMD_PAGEADDR | page, LCDF_E1 | LCDF_E2);
369 for (j = 0; j < LCD_PAGESIZE; j++)
370 lcd_write(0, LCDF_E1 | LCDF_E2);
375 static void lcd_writeraster(const uint8_t *raster)
378 const uint8_t *right_raster;
380 CHECK_WALL(wall_before_raster);
381 CHECK_WALL(wall_after_raster);
383 for (page = 0; page < LCD_PAGES; ++page)
385 lcd_cmd(LCD_CMD_PAGEADDR | page, LCDF_E1 | LCDF_E2);
386 lcd_cmd(LCD_CMD_COLADDR | 0, LCDF_E1 | LCDF_E2);
388 /* Super optimized lamer loop */
389 right_raster = raster + LCD_PAGESIZE;
393 lcd_write(*raster++, LCDF_E1);
394 lcd_write(*right_raster++, LCDF_E2);
397 raster = right_raster;
402 void lcd_blit_bitmap(Bitmap *bm)
404 lcd_writeraster(bm->raster);
408 #ifdef CONFIG_LCD_SOFTINT_REFRESH
410 static void lcd_refresh_softint(void)
412 lcd_blit_bitmap(&lcd_bitmap);
413 timer_add(lcd_refresh_timer);
416 #endif /* CONFIG_LCD_SOFTINT_REFRESH */
420 * Initialize LCD subsystem.
422 * \note The PWM used for LCD contrast is initialized in drv/pwm.c
423 * because it is the same PWM used for output attenuation.
427 // FIXME: interrupts are already disabled when we get here?!?
429 IRQ_SAVE_DISABLE(flags);
431 PORTB |= BV(LCD_PB_A0);
432 DDRB |= BV(LCD_PB_A0);
434 PORTE &= ~(BV(LCD_PE_RW) | BV(LCD_PE_E1) | BV(LCD_PE_E2));
435 DDRE |= BV(LCD_PE_RW) | BV(LCD_PE_E1) | BV(LCD_PE_E2);
438 LCD_RESET_PORT |= BV(LCD_RESET_BIT);
439 LCD_RESET_DDR |= BV(LCD_RESET_BIT);
442 LCD_RESET_PORT &= ~BV(LCD_RESET_BIT);
445 LCD_RESET_PORT |= BV(LCD_RESET_BIT);
448 * Data bus is in output state most of the time:
449 * LCD r/w functions assume it is left in output state
453 // Wait for RST line to stabilize at Vcc.
456 IRQ_SAVE_DISABLE(flags);
458 lcd_cmd(LCD_CMD_RESET, LCDF_E1 | LCDF_E2);
459 lcd_cmd(LCD_CMD_DISPLAY_ON, LCDF_E1 | LCDF_E2);
460 lcd_cmd(LCD_CMD_STARTLINE | 0, LCDF_E1 | LCDF_E2);
462 /* Initialize anti-corruption walls for raster */
463 INIT_WALL(wall_before_raster);
464 INIT_WALL(wall_after_raster);
469 lcd_setpwm(LCD_DEF_PWM);
471 gfx_bitmapInit(&lcd_bitmap, lcd_raster, LCD_WIDTH, LCD_HEIGHT);
472 gfx_bitmapClear(&lcd_bitmap);
474 #ifdef CONFIG_LCD_SOFTINT_REFRESH
476 /* Init IRQ driven LCD refresh */
477 lcd_refresh_timer = timer_new();
478 ASSERT(lcd_refresh_timer != NULL);
479 INITEVENT_INT(&lcd_refresh_timer->expire, (Hook)lcd_refresh_softint, 0);
480 lcd_refresh_timer->delay = LCD_REFRESH_INTERVAL;
481 timer_add(lcd_refresh_timer);
483 #endif /* CONFIG_LCD_SOFTINT_REFRESH */