4 * Copyright (C) 2003,2004 Develer S.r.l. (http://www.develer.com/)
5 * This file is part of DevLib - See devlib/README for information.
10 * \author Stefano Fedrigo <aleph@develer.com>
11 * \author Giovanni Bajo <rasky@develer.com>
13 * \brief DSP5680x CPU specific serial I/O driver
18 * Revision 1.4 2004/07/30 14:27:49 rasky
19 * Aggiornati alcuni file DSP56k per la nuova libreria di IRQ management
21 * Revision 1.3 2004/06/03 11:27:09 bernie
22 * Add dual-license information.
24 * Revision 1.2 2004/05/23 18:21:53 bernie
25 * Trim CVS logs and cleanup header info.
31 #include <drv/kdebug.h>
34 #include <DSP56F807.H>
36 // GPIO E is shared with SPI (in DSP56807). Pins 0&1 are TXD0 and RXD0. To use
37 // the serial, we need to disable the GPIO functions on them.
38 #define REG_GPIO_SERIAL REG_GPIO_E
39 #define REG_GPIO_SERIAL_MASK 0x3
41 // Check flag consistency
42 #if (SERRF_PARITYERROR != REG_SCI_SR_PF) || \
43 (SERRF_RXSROVERRUN != REG_SCI_SR_OR) || \
44 (SERRF_FRAMEERROR != REG_SCI_SR_FE) || \
45 (SERRF_NOISEERROR != REG_SCI_SR_NF)
46 #error error flags do not match with register bits
51 struct SerialHardware hw;
52 struct Serial* serial;
53 volatile struct REG_SCI_STRUCT* regs;
58 static inline void enable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
60 regs->CR |= REG_SCI_CR_TEIE | REG_SCI_CR_TIIE;
63 static inline void enable_rx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
65 regs->CR |= REG_SCI_CR_RIE | REG_SCI_CR_REIE;
68 static inline void disable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
70 regs->CR &= ~(REG_SCI_CR_TEIE | REG_SCI_CR_TIIE);
73 static inline void disable_rx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
75 regs->CR &= ~(REG_SCI_CR_RIE | REG_SCI_CR_REIE);
78 static inline void disable_tx_irq(struct SerialHardware* _hw)
80 struct SCI* hw = (struct SCI*)_hw;
81 volatile struct REG_SCI_STRUCT* regs = hw->regs;
83 disable_tx_irq_bare(regs);
86 static inline void enable_tx_irq(struct SerialHardware* _hw)
88 struct SCI* hw = (struct SCI*)_hw;
89 volatile struct REG_SCI_STRUCT* regs = hw->regs;
91 enable_tx_irq_bare(regs);
94 static inline void enable_rx_irq(struct SerialHardware* _hw)
96 struct SCI* hw = (struct SCI*)_hw;
97 volatile struct REG_SCI_STRUCT* regs = hw->regs;
99 enable_rx_irq_bare(regs);
102 static void tx_isr(const struct SCI *hw)
104 #pragma interrupt warn
105 volatile struct REG_SCI_STRUCT* regs = hw->regs;
107 if (fifo_isempty(&hw->serial->txfifo))
108 disable_tx_irq_bare(regs);
111 // Clear transmitter flags before sending data
113 regs->DR = fifo_pop(&hw->serial->txfifo);
117 static void rx_isr(const struct SCI *hw)
119 #pragma interrupt warn
120 volatile struct REG_SCI_STRUCT* regs = hw->regs;
122 hw->serial->status |= regs->SR & (SERRF_PARITYERROR |
127 if (fifo_isfull(&hw->serial->rxfifo))
128 hw->serial->status |= SERRF_RXFIFOOVERRUN;
130 fifo_push(&hw->serial->rxfifo, regs->DR);
132 // Writing anything to the status register clear the
137 static void init(struct SerialHardware* _hw, struct Serial* ser)
139 struct SCI* hw = (struct SCI*)_hw;
140 volatile struct REG_SCI_STRUCT* regs = hw->regs;
142 // Clear status register (IRQ/status flags)
146 // Clear data register
149 // Install the handlers and set priorities for both IRQs
150 irq_install(hw->irq_tx, (isr_t)tx_isr, hw);
151 irq_install(hw->irq_rx, (isr_t)rx_isr, hw);
152 irq_setpriority(hw->irq_tx, IRQ_PRIORITY_SCI_TX);
153 irq_setpriority(hw->irq_rx, IRQ_PRIORITY_SCI_RX);
155 // Activate the RX error interrupts, and RX/TX transmissions
156 regs->CR = REG_SCI_CR_TE | REG_SCI_CR_RE;
157 enable_rx_irq_bare(regs);
159 // Disable GPIO pins for TX and RX lines
160 REG_GPIO_SERIAL->PER |= REG_GPIO_SERIAL_MASK;
165 static void cleanup(struct SerialHardware* _hw)
171 static void setbaudrate(struct SerialHardware* _hw, unsigned long rate)
173 struct SCI* hw = (struct SCI*)_hw;
175 // SCI has an internal 16x divider on the input clock, which comes
176 // from the IPbus (see the scheme in user manual, 12.7.3). We apply
177 // it to calculate the period to store in the register.
178 hw->regs->BR = (IPBUS_FREQ + rate * 8ul) / (rate * 16ul);
181 static void setparity(struct SerialHardware* _hw, int parity)
188 static const struct SerialHardwareVT SCI_VT =
192 .setbaudrate = setbaudrate,
193 .setparity = setparity,
194 .enabletxirq = enable_tx_irq,
197 static struct SCI SCIDescs[2] =
200 .hw = { .table = &SCI_VT },
202 .irq_rx = IRQ_SCI0_RECEIVER_FULL,
203 .irq_tx = IRQ_SCI0_TRANSMITTER_READY,
207 .hw = { .table = &SCI_VT },
209 .irq_rx = IRQ_SCI1_RECEIVER_FULL,
210 .irq_tx = IRQ_SCI1_TRANSMITTER_READY,
215 struct SerialHardware* ser_hw_getdesc(int unit)
218 return &SCIDescs[unit].hw;