4 * Copyright 2003, 2004 Develer S.r.l. (http://www.develer.com/)
5 * This file is part of DevLib - See README.devlib for information.
10 * \author Stefano Fedrigo <aleph@develer.com>
11 * \author Giovanni Bajo <rasky@develer.com>
13 * \brief DSP5680x CPU specific serial I/O driver
18 *#* Revision 1.14 2006/07/19 12:56:26 bernie
19 *#* Convert to new Doxygen style.
21 *#* Revision 1.13 2005/11/04 16:20:02 bernie
22 *#* Fix reference to README.devlib in header.
24 *#* Revision 1.12 2005/04/11 19:10:27 bernie
25 *#* Include top-level headers from cfg/ subdir.
27 *#* Revision 1.11 2005/01/25 07:42:04 bernie
30 *#* Revision 1.10 2005/01/14 00:48:33 aleph
31 *#* Rename callbacks; SerialHardwareVT.txSending: New callback.
33 *#* Revision 1.9 2004/12/08 09:42:55 bernie
34 *#* Add support for multiplexed serial ports.
36 *#* Revision 1.8 2004/10/26 09:00:49 bernie
37 *#* Don't access serial data register twice.
39 *#* Revision 1.7 2004/10/19 08:57:15 bernie
40 *#* Bugfixes for DSP56K serial driver from scfirm.
42 *#* Revision 1.5 2004/08/25 14:12:08 rasky
43 *#* Aggiornato il comment block dei log RCS
45 *#* Revision 1.4 2004/07/30 14:27:49 rasky
46 *#* Aggiornati alcuni file DSP56k per la nuova libreria di IRQ management
48 *#* Revision 1.3 2004/06/03 11:27:09 bernie
49 *#* Add dual-license information.
51 *#* Revision 1.2 2004/05/23 18:21:53 bernie
52 *#* Trim CVS logs and cleanup header info.
58 #include <cfg/debug.h>
60 #include <DSP56F807.h>
62 // GPIO E is shared with SPI (in DSP56807). Pins 0&1 are TXD0 and RXD0. To use
63 // the serial, we need to disable the GPIO functions on them.
64 #define REG_GPIO_SERIAL_0 REG_GPIO_E
65 #define REG_GPIO_SERIAL_MASK_0 0x03
67 #define REG_GPIO_SERIAL_1 REG_GPIO_D
68 #define REG_GPIO_SERIAL_MASK_1 0xC0
71 // Check flag consistency
72 #if (SERRF_PARITYERROR != REG_SCI_SR_PF) || \
73 (SERRF_RXSROVERRUN != REG_SCI_SR_OR) || \
74 (SERRF_FRAMEERROR != REG_SCI_SR_FE) || \
75 (SERRF_NOISEERROR != REG_SCI_SR_NF)
76 #error error flags do not match with register bits
79 static unsigned char ser0_fifo_rx[CONFIG_SER0_FIFOSIZE_RX];
80 static unsigned char ser0_fifo_tx[CONFIG_SER0_FIFOSIZE_TX];
81 static unsigned char ser1_fifo_rx[CONFIG_SER1_FIFOSIZE_RX];
82 static unsigned char ser1_fifo_tx[CONFIG_SER1_FIFOSIZE_TX];
87 #define MAX_MULTI_GROUPS 1
89 struct Semaphore multi_sems[MAX_MULTI_GROUPS];
95 struct SerialHardware hw;
96 struct Serial* serial;
97 volatile struct REG_SCI_STRUCT* regs;
104 static inline void enable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
106 regs->CR |= REG_SCI_CR_TEIE | REG_SCI_CR_TIIE;
109 static inline void enable_rx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
111 regs->CR |= REG_SCI_CR_RIE;
114 static inline void disable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
116 regs->CR &= ~(REG_SCI_CR_TEIE | REG_SCI_CR_TIIE);
119 static inline void disable_rx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
121 regs->CR &= ~(REG_SCI_CR_RIE | REG_SCI_CR_REIE);
124 static inline void disable_tx_irq(struct SerialHardware* _hw)
126 struct SCI* hw = (struct SCI*)_hw;
128 disable_tx_irq_bare(hw->regs);
131 static inline void disable_rx_irq(struct SerialHardware* _hw)
133 struct SCI* hw = (struct SCI*)_hw;
135 disable_rx_irq_bare(hw->regs);
138 static inline void enable_tx_irq(struct SerialHardware* _hw)
140 struct SCI* hw = (struct SCI*)_hw;
142 enable_tx_irq_bare(hw->regs);
145 static inline void enable_rx_irq(struct SerialHardware* _hw)
147 struct SCI* hw = (struct SCI*)_hw;
149 enable_rx_irq_bare(hw->regs);
152 static inline bool tx_irq_enabled(struct SerialHardware* _hw)
154 struct SCI* hw = (struct SCI*)_hw;
156 return (hw->regs->CR & REG_SCI_CR_TEIE);
159 static void tx_isr(const struct SCI *hw)
161 #pragma interrupt warn
162 volatile struct REG_SCI_STRUCT* regs = hw->regs;
164 if (fifo_isempty(&hw->serial->txfifo))
165 disable_tx_irq_bare(regs);
168 // Clear transmitter flags before sending data
170 regs->DR = fifo_pop(&hw->serial->txfifo);
174 static void rx_isr(const struct SCI *hw)
176 #pragma interrupt warn
177 volatile struct REG_SCI_STRUCT* regs = hw->regs;
180 hw->serial->status |= regs->SR & (SERRF_PARITYERROR |
186 * Serial IRQ can happen for two reason: data ready (RDRF) or overrun (OR)
187 * If the data is ready, we need to fetch it from the data register or
188 * the interrupt will retrigger immediatly. In case of overrun, instead,
189 * the value of the data register is meaningless.
191 if (regs->SR & REG_SCI_SR_RDRF)
193 unsigned char data = regs->DR;
195 if (fifo_isfull(&hw->serial->rxfifo))
196 hw->serial->status |= SERRF_RXFIFOOVERRUN;
198 fifo_push(&hw->serial->rxfifo, data);
201 // Writing anything to the status register clear the error bits.
205 static void init(struct SerialHardware* _hw, struct Serial* ser)
207 struct SCI* hw = (struct SCI*)_hw;
208 volatile struct REG_SCI_STRUCT* regs = hw->regs;
210 // Clear status register (IRQ/status flags)
214 // Clear data register
217 // Install the handlers and set priorities for both IRQs
218 irq_install(hw->irq_tx, (isr_t)tx_isr, hw);
219 irq_install(hw->irq_rx, (isr_t)rx_isr, hw);
220 irq_setpriority(hw->irq_tx, IRQ_PRIORITY_SCI_TX);
221 irq_setpriority(hw->irq_rx, IRQ_PRIORITY_SCI_RX);
223 // Activate the RX error interrupts, and RX/TX transmissions
224 regs->CR = REG_SCI_CR_TE | REG_SCI_CR_RE;
225 enable_rx_irq_bare(regs);
227 // Disable GPIO pins for TX and RX lines
228 // \todo this should be divided into serial 0 and 1
229 REG_GPIO_SERIAL_0->PER |= REG_GPIO_SERIAL_MASK_0;
230 REG_GPIO_SERIAL_1->PER |= REG_GPIO_SERIAL_MASK_1;
235 static void cleanup(struct SerialHardware* _hw)
237 struct SCI* hw = (struct SCI*)_hw;
239 // Uninstall the ISRs
242 irq_uninstall(hw->irq_tx);
243 irq_uninstall(hw->irq_rx);
246 static void setbaudrate(struct SerialHardware* _hw, unsigned long rate)
248 struct SCI* hw = (struct SCI*)_hw;
250 // SCI has an internal 16x divider on the input clock, which comes
251 // from the IPbus (see the scheme in user manual, 12.7.3). We apply
252 // it to calculate the period to store in the register.
253 hw->regs->BR = (IPBUS_FREQ + rate * 8ul) / (rate * 16ul);
256 static void setparity(struct SerialHardware* _hw, int parity)
265 static void multi_init(void)
267 static bool flag = false;
273 for (i = 0; i < MAX_MULTI_GROUPS; ++i)
274 sem_init(&multi_sems[i]);
278 static void init_lock(struct SerialHardware* _hw, struct Serial *ser)
280 struct SCI* hw = (struct SCI*)_hw;
282 // Initialize the multi engine (if needed)
285 // Acquire the lock of the semaphore for this group
286 ASSERT(hw->num_group >= 0);
287 ASSERT(hw->num_group < MAX_MULTI_GROUPS);
288 sem_obtain(&multi_sems[hw->num_group]);
290 // Do a hardware switch to the given serial
291 ser_hw_switch(hw->num_group, hw->id);
296 static void cleanup_unlock(struct SerialHardware* _hw)
298 struct SCI* hw = (struct SCI*)_hw;
302 sem_release(&multi_sems[hw->num_group]);
305 #endif /* CONFIG_SER_MULTI */
308 static const struct SerialHardwareVT SCI_VT =
312 .setBaudrate = setbaudrate,
313 .setParity = setparity,
314 .txStart = enable_tx_irq,
315 .txSending = tx_irq_enabled,
319 static const struct SerialHardwareVT SCI_MULTI_VT =
322 .cleanup = cleanup_unlock,
323 .setBaudrate = setbaudrate,
324 .setParity = setparity,
325 .txStart = enable_tx_irq,
326 .txSending = tx_irq_enabled,
328 #endif /* CONFIG_SER_MULTI */
330 #define SCI_DESC_NORMAL(hwch) \
335 .rxbuffer = ser ## hwch ## _fifo_rx, \
336 .txbuffer = ser ## hwch ## _fifo_tx, \
337 .rxbuffer_size = countof(ser ## hwch ## _fifo_rx), \
338 .txbuffer_size = countof(ser ## hwch ## _fifo_tx), \
340 .regs = ®_SCI[hwch], \
341 .irq_rx = IRQ_SCI ## hwch ## _RECEIVER_FULL, \
342 .irq_tx = IRQ_SCI ## hwch ## _TRANSMITTER_READY, \
349 #define SCI_DESC_MULTI(hwch, group_, id_) \
353 .table = &SCI_MULTI_VT, \
354 .rxbuffer = ser ## hwch ## _fifo_rx, \
355 .txbuffer = ser ## hwch ## _fifo_tx, \
356 .rxbuffer_size = countof(ser ## hwch ## _fifo_rx), \
357 .txbuffer_size = countof(ser ## hwch ## _fifo_tx), \
359 .regs = ®_SCI[hwch], \
360 .irq_rx = IRQ_SCI ## hwch ## _RECEIVER_FULL, \
361 .irq_tx = IRQ_SCI ## hwch ## _TRANSMITTER_READY, \
362 .num_group = group_, \
366 #endif /* CONFIG_SER_MULTI */
368 // \todo Move this into hw.h, with a little preprocessor magic
369 static struct SCI SCIDescs[] =
372 SCI_DESC_MULTI(1, 0, 0),
373 SCI_DESC_MULTI(1, 0, 1),
376 struct SerialHardware* ser_hw_getdesc(int unit)
378 ASSERT(unit < countof(SCIDescs));
379 return &SCIDescs[unit].hw;