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29 * Copyright 2003, 2004 Develer S.r.l. (http://www.develer.com/)
35 * \author Stefano Fedrigo <aleph@develer.com>
36 * \author Giovanni Bajo <rasky@develer.com>
38 * \brief DSP5680x CPU specific serial I/O driver
43 *#* Revision 1.14 2006/07/19 12:56:26 bernie
44 *#* Convert to new Doxygen style.
46 *#* Revision 1.13 2005/11/04 16:20:02 bernie
47 *#* Fix reference to README.devlib in header.
49 *#* Revision 1.12 2005/04/11 19:10:27 bernie
50 *#* Include top-level headers from cfg/ subdir.
52 *#* Revision 1.11 2005/01/25 07:42:04 bernie
55 *#* Revision 1.10 2005/01/14 00:48:33 aleph
56 *#* Rename callbacks; SerialHardwareVT.txSending: New callback.
58 *#* Revision 1.9 2004/12/08 09:42:55 bernie
59 *#* Add support for multiplexed serial ports.
61 *#* Revision 1.8 2004/10/26 09:00:49 bernie
62 *#* Don't access serial data register twice.
64 *#* Revision 1.7 2004/10/19 08:57:15 bernie
65 *#* Bugfixes for DSP56K serial driver from scfirm.
67 *#* Revision 1.5 2004/08/25 14:12:08 rasky
68 *#* Aggiornato il comment block dei log RCS
70 *#* Revision 1.4 2004/07/30 14:27:49 rasky
71 *#* Aggiornati alcuni file DSP56k per la nuova libreria di IRQ management
73 *#* Revision 1.3 2004/06/03 11:27:09 bernie
74 *#* Add dual-license information.
76 *#* Revision 1.2 2004/05/23 18:21:53 bernie
77 *#* Trim CVS logs and cleanup header info.
83 #include <cfg/debug.h>
85 #include <DSP56F807.h>
87 // GPIO E is shared with SPI (in DSP56807). Pins 0&1 are TXD0 and RXD0. To use
88 // the serial, we need to disable the GPIO functions on them.
89 #define REG_GPIO_SERIAL_0 REG_GPIO_E
90 #define REG_GPIO_SERIAL_MASK_0 0x03
92 #define REG_GPIO_SERIAL_1 REG_GPIO_D
93 #define REG_GPIO_SERIAL_MASK_1 0xC0
96 // Check flag consistency
97 #if (SERRF_PARITYERROR != REG_SCI_SR_PF) || \
98 (SERRF_RXSROVERRUN != REG_SCI_SR_OR) || \
99 (SERRF_FRAMEERROR != REG_SCI_SR_FE) || \
100 (SERRF_NOISEERROR != REG_SCI_SR_NF)
101 #error error flags do not match with register bits
104 static unsigned char ser0_fifo_rx[CONFIG_SER0_FIFOSIZE_RX];
105 static unsigned char ser0_fifo_tx[CONFIG_SER0_FIFOSIZE_TX];
106 static unsigned char ser1_fifo_rx[CONFIG_SER1_FIFOSIZE_RX];
107 static unsigned char ser1_fifo_tx[CONFIG_SER1_FIFOSIZE_TX];
110 #include <kern/sem.h>
112 #define MAX_MULTI_GROUPS 1
114 struct Semaphore multi_sems[MAX_MULTI_GROUPS];
120 struct SerialHardware hw;
121 struct Serial* serial;
122 volatile struct REG_SCI_STRUCT* regs;
129 static inline void enable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
131 regs->CR |= REG_SCI_CR_TEIE | REG_SCI_CR_TIIE;
134 static inline void enable_rx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
136 regs->CR |= REG_SCI_CR_RIE;
139 static inline void disable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
141 regs->CR &= ~(REG_SCI_CR_TEIE | REG_SCI_CR_TIIE);
144 static inline void disable_rx_irq_bare(volatile struct REG_SCI_STRUCT* regs)
146 regs->CR &= ~(REG_SCI_CR_RIE | REG_SCI_CR_REIE);
149 static inline void disable_tx_irq(struct SerialHardware* _hw)
151 struct SCI* hw = (struct SCI*)_hw;
153 disable_tx_irq_bare(hw->regs);
156 static inline void disable_rx_irq(struct SerialHardware* _hw)
158 struct SCI* hw = (struct SCI*)_hw;
160 disable_rx_irq_bare(hw->regs);
163 static inline void enable_tx_irq(struct SerialHardware* _hw)
165 struct SCI* hw = (struct SCI*)_hw;
167 enable_tx_irq_bare(hw->regs);
170 static inline void enable_rx_irq(struct SerialHardware* _hw)
172 struct SCI* hw = (struct SCI*)_hw;
174 enable_rx_irq_bare(hw->regs);
177 static inline bool tx_irq_enabled(struct SerialHardware* _hw)
179 struct SCI* hw = (struct SCI*)_hw;
181 return (hw->regs->CR & REG_SCI_CR_TEIE);
184 static void tx_isr(const struct SCI *hw)
186 #pragma interrupt warn
187 volatile struct REG_SCI_STRUCT* regs = hw->regs;
189 if (fifo_isempty(&hw->serial->txfifo))
190 disable_tx_irq_bare(regs);
193 // Clear transmitter flags before sending data
195 regs->DR = fifo_pop(&hw->serial->txfifo);
199 static void rx_isr(const struct SCI *hw)
201 #pragma interrupt warn
202 volatile struct REG_SCI_STRUCT* regs = hw->regs;
205 hw->serial->status |= regs->SR & (SERRF_PARITYERROR |
211 * Serial IRQ can happen for two reason: data ready (RDRF) or overrun (OR)
212 * If the data is ready, we need to fetch it from the data register or
213 * the interrupt will retrigger immediatly. In case of overrun, instead,
214 * the value of the data register is meaningless.
216 if (regs->SR & REG_SCI_SR_RDRF)
218 unsigned char data = regs->DR;
220 if (fifo_isfull(&hw->serial->rxfifo))
221 hw->serial->status |= SERRF_RXFIFOOVERRUN;
223 fifo_push(&hw->serial->rxfifo, data);
226 // Writing anything to the status register clear the error bits.
230 static void init(struct SerialHardware* _hw, struct Serial* ser)
232 struct SCI* hw = (struct SCI*)_hw;
233 volatile struct REG_SCI_STRUCT* regs = hw->regs;
235 // Clear status register (IRQ/status flags)
239 // Clear data register
242 // Install the handlers and set priorities for both IRQs
243 irq_install(hw->irq_tx, (isr_t)tx_isr, hw);
244 irq_install(hw->irq_rx, (isr_t)rx_isr, hw);
245 irq_setpriority(hw->irq_tx, IRQ_PRIORITY_SCI_TX);
246 irq_setpriority(hw->irq_rx, IRQ_PRIORITY_SCI_RX);
248 // Activate the RX error interrupts, and RX/TX transmissions
249 regs->CR = REG_SCI_CR_TE | REG_SCI_CR_RE;
250 enable_rx_irq_bare(regs);
252 // Disable GPIO pins for TX and RX lines
253 // \todo this should be divided into serial 0 and 1
254 REG_GPIO_SERIAL_0->PER |= REG_GPIO_SERIAL_MASK_0;
255 REG_GPIO_SERIAL_1->PER |= REG_GPIO_SERIAL_MASK_1;
260 static void cleanup(struct SerialHardware* _hw)
262 struct SCI* hw = (struct SCI*)_hw;
264 // Uninstall the ISRs
267 irq_uninstall(hw->irq_tx);
268 irq_uninstall(hw->irq_rx);
271 static void setbaudrate(struct SerialHardware* _hw, unsigned long rate)
273 struct SCI* hw = (struct SCI*)_hw;
275 // SCI has an internal 16x divider on the input clock, which comes
276 // from the IPbus (see the scheme in user manual, 12.7.3). We apply
277 // it to calculate the period to store in the register.
278 hw->regs->BR = (IPBUS_FREQ + rate * 8ul) / (rate * 16ul);
281 static void setparity(struct SerialHardware* _hw, int parity)
290 static void multi_init(void)
292 static bool flag = false;
298 for (i = 0; i < MAX_MULTI_GROUPS; ++i)
299 sem_init(&multi_sems[i]);
303 static void init_lock(struct SerialHardware* _hw, struct Serial *ser)
305 struct SCI* hw = (struct SCI*)_hw;
307 // Initialize the multi engine (if needed)
310 // Acquire the lock of the semaphore for this group
311 ASSERT(hw->num_group >= 0);
312 ASSERT(hw->num_group < MAX_MULTI_GROUPS);
313 sem_obtain(&multi_sems[hw->num_group]);
315 // Do a hardware switch to the given serial
316 ser_hw_switch(hw->num_group, hw->id);
321 static void cleanup_unlock(struct SerialHardware* _hw)
323 struct SCI* hw = (struct SCI*)_hw;
327 sem_release(&multi_sems[hw->num_group]);
330 #endif /* CONFIG_SER_MULTI */
333 static const struct SerialHardwareVT SCI_VT =
337 .setBaudrate = setbaudrate,
338 .setParity = setparity,
339 .txStart = enable_tx_irq,
340 .txSending = tx_irq_enabled,
344 static const struct SerialHardwareVT SCI_MULTI_VT =
347 .cleanup = cleanup_unlock,
348 .setBaudrate = setbaudrate,
349 .setParity = setparity,
350 .txStart = enable_tx_irq,
351 .txSending = tx_irq_enabled,
353 #endif /* CONFIG_SER_MULTI */
355 #define SCI_DESC_NORMAL(hwch) \
360 .rxbuffer = ser ## hwch ## _fifo_rx, \
361 .txbuffer = ser ## hwch ## _fifo_tx, \
362 .rxbuffer_size = countof(ser ## hwch ## _fifo_rx), \
363 .txbuffer_size = countof(ser ## hwch ## _fifo_tx), \
365 .regs = ®_SCI[hwch], \
366 .irq_rx = IRQ_SCI ## hwch ## _RECEIVER_FULL, \
367 .irq_tx = IRQ_SCI ## hwch ## _TRANSMITTER_READY, \
374 #define SCI_DESC_MULTI(hwch, group_, id_) \
378 .table = &SCI_MULTI_VT, \
379 .rxbuffer = ser ## hwch ## _fifo_rx, \
380 .txbuffer = ser ## hwch ## _fifo_tx, \
381 .rxbuffer_size = countof(ser ## hwch ## _fifo_rx), \
382 .txbuffer_size = countof(ser ## hwch ## _fifo_tx), \
384 .regs = ®_SCI[hwch], \
385 .irq_rx = IRQ_SCI ## hwch ## _RECEIVER_FULL, \
386 .irq_tx = IRQ_SCI ## hwch ## _TRANSMITTER_READY, \
387 .num_group = group_, \
391 #endif /* CONFIG_SER_MULTI */
393 // \todo Move this into hw.h, with a little preprocessor magic
394 static struct SCI SCIDescs[] =
397 SCI_DESC_MULTI(1, 0, 0),
398 SCI_DESC_MULTI(1, 0, 1),
401 struct SerialHardware* ser_hw_getdesc(int unit)
403 ASSERT(unit < countof(SCIDescs));
404 return &SCIDescs[unit].hw;