4 * Copyright 2003, 2004 Develer S.r.l. (http://www.develer.com/)
10 * \author Stefano Fedrigo <aleph@develer.com>
11 * \author Bernardo Innocenti <bernie@develer.com>
13 * \brief Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation)
15 * \note This implementation is AVR specific.
20 *#* Revision 1.9 2004/09/14 21:03:46 bernie
21 *#* Use debug.h instead of kdebug.h.
23 *#* Revision 1.8 2004/08/25 14:12:08 rasky
24 *#* Aggiornato il comment block dei log RCS
26 *#* Revision 1.7 2004/08/24 16:48:40 bernie
27 *#* Note reason for including <macros.h>
29 *#* Revision 1.6 2004/08/24 14:27:20 bernie
32 *#* Revision 1.5 2004/08/24 13:46:48 bernie
33 *#* Include <macros.h>.
35 *#* Revision 1.4 2004/08/10 06:57:22 bernie
36 *#* eeprom_erase(): New function.
38 *#* Revision 1.3 2004/07/29 22:57:09 bernie
39 *#* Add 24LC16 support.
41 *#* Revision 1.2 2004/07/22 01:24:43 bernie
42 *#* Document AVR dependency.
44 *#* Revision 1.1 2004/07/20 17:11:18 bernie
45 *#* Import into DevLib.
51 #include <mware/byteorder.h> /* cpu_to_be16() */
54 #include <macros.h> // MIN()
56 #include <string.h> // memset()
61 /* Wait for TWINT flag set: bus is ready */
62 #define WAIT_TWI_READY do {} while (!(TWCR & BV(TWINT)))
64 /*! \name EEPROM control codes */
72 * Send START condition on the bus.
74 * \return true on success, false otherwise.
76 static bool twi_start(void)
78 TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN);
81 if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START)
84 DB(kprintf("!TW_(REP)START: %x\n", TWSR);)
90 * Send START condition and select slave for write.
92 * \return true on success, false otherwise.
94 static bool twi_start_w(uint8_t slave_addr)
96 ASSERT(slave_addr < 8);
99 * Loop on the select write sequence: when the eeprom is busy
100 * writing previously sent data it will reply to the SLA_W
101 * control byte with a NACK. In this case, we must
102 * keep trying until the eeprom responds with an ACK.
106 TWDR = SLA_W | (slave_addr << 1);
107 TWCR = BV(TWINT) | BV(TWEN);
110 if (TW_STATUS == TW_MT_SLA_ACK)
112 else if (TW_STATUS != TW_MT_SLA_NACK)
114 DB(kprintf("!TW_MT_SLA_(N)ACK: %x\n", TWSR);)
124 * Send START condition and select slave for read.
126 * \return true on success, false otherwise.
128 static bool twi_start_r(uint8_t slave_addr)
130 ASSERT(slave_addr < 8);
134 TWDR = SLA_R | (slave_addr << 1);
135 TWCR = BV(TWINT) | BV(TWEN);
138 if (TW_STATUS == TW_MR_SLA_ACK)
141 DB(kprintf("!TW_MR_SLA_ACK: %x\n", TWSR);)
149 * Send STOP condition.
151 static void twi_stop(void)
153 TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO);
158 * Send a sequence of bytes in master transmitter mode
159 * to the selected slave device through the TWI bus.
161 * \return true on success, false on error.
163 static bool twi_send(const uint8_t *buf, size_t count)
168 TWCR = BV(TWINT) | BV(TWEN);
170 if (TW_STATUS != TW_MT_DATA_ACK)
172 DB(kprintf("!TW_MT_DATA_ACK: %x\n", TWSR);)
182 * Receive a sequence of one or more bytes from the
183 * selected slave device in master receive mode through
186 * Received data is placed in \c buf.
188 * \return true on success, false on error
190 static bool twi_recv(uint8_t *buf, size_t count)
193 * When reading the last byte the TWEA bit is not
194 * set, and the eeprom should answer with NACK
198 TWCR = BV(TWINT) | BV(TWEN) | (count ? BV(TWEA) : 0);
203 if (TW_STATUS != TW_MR_DATA_ACK)
205 DB(kprintf("!TW_MR_DATA_ACK: %x\n", TWSR);)
211 if (TW_STATUS != TW_MR_DATA_NACK)
213 DB(kprintf("!TW_MR_DATA_NACK: %x\n", TWSR);)
224 * Copy \c count bytes from buffer \c buf to
225 * eeprom at address \c addr.
227 bool eeprom_write(e2addr_t addr, const void *buf, size_t count)
230 ASSERT(addr + count <= EEPROM_SIZE);
232 while (count && result)
235 * Split write in multiple sequential mode operations that
236 * don't cross page boundaries.
239 MIN(count, (size_t)(EEPROM_BLKSIZE - (addr & (EEPROM_BLKSIZE - 1))));
241 #if CONFIG_EEPROM_TYPE == EEPROM_24XX16
243 * The 24LC16 uses the slave address as a 3-bit
246 uint8_t blk_addr = (uint8_t)((addr >> 8) & 0x07);
247 uint8_t blk_offs = (uint8_t)addr;
250 twi_start_w(blk_addr)
251 && twi_send(&blk_offs, sizeof blk_offs)
252 && twi_send(buf, size);
254 #elif CONFIG_EEPROM_TYPE == EEPROM_24XX256
256 // 24LC256 wants big-endian addresses
257 uint16_t addr_be = cpu_to_be16(addr);
261 && twi_send((uint8_t *)&addr_be, sizeof addr_be)
262 && twi_send(buf, size);
265 #error Unknown device type
271 //kprintf("addr=%d, count=%d, size=%d, *#?=%d\n",
272 // addr, count, size,
273 // (EEPROM_BLKSIZE - (addr & (EEPROM_BLKSIZE - 1)))
276 /* Update count and addr for next operation */
279 buf = ((const char *)buf) + size;
287 * Copy \c count bytes at address \c addr
288 * from eeprom to RAM to buffer \c buf.
290 bool eeprom_read(e2addr_t addr, void *buf, size_t count)
292 ASSERT(addr + count <= EEPROM_SIZE);
294 #if CONFIG_EEPROM_TYPE == EEPROM_24XX16
296 * The 24LC16 uses the slave address as a 3-bit
299 uint8_t blk_addr = (uint8_t)((addr >> 8) & 0x07);
300 uint8_t blk_offs = (uint8_t)addr;
303 twi_start_w(blk_addr)
304 && twi_send(&blk_offs, sizeof blk_offs)
305 && twi_start_r(blk_addr)
306 && twi_recv(buf, count);
308 #elif CONFIG_EEPROM_TYPE == EEPROM_24XX256
310 // 24LC256 wants big-endian addresses
311 addr = cpu_to_be16(addr);
315 && twi_send((uint8_t *)&addr, sizeof(addr))
317 && twi_recv(buf, count);
319 #error Unknown device type
329 * Write a single character \a c at address \a addr.
331 bool eeprom_write_char(e2addr_t addr, char c)
333 return eeprom_write(addr, &c, 1);
338 * Read a single character at address \a addr.
340 * \return the requested character or -1 in case of failure.
342 int eeprom_read_char(e2addr_t addr)
346 if (eeprom_read(addr, &c, 1))
354 * Erase specified part of eeprom, writing 0xFF.
356 * \param addr starting address
357 * \param count length of block to erase
359 void eeprom_erase(e2addr_t addr, size_t count)
361 uint8_t buf[EEPROM_BLKSIZE];
362 memset(buf, 0xFF, sizeof buf);
364 // Clear all but struct hw_info at start of eeprom
367 size_t size = MIN(count, sizeof buf);
368 eeprom_write(addr, buf, size);
376 * Initialize TWI module.
378 void eeprom_init(void)
381 DISABLE_IRQSAVE(flags);
383 #if defined(__AVR_ATmega64__)
384 PORTD |= BV(PD0) | BV(PD1);
385 DDRD |= BV(PD0) | BV(PD1);
386 #elif defined(__AVR_ATmega8__)
387 PORTC |= BV(PC4) | BV(PC5);
388 DDRC |= BV(PC4) | BV(PC5);
390 #error Unsupported architecture
395 * F = CLOCK_FREQ / (16 + 2*TWBR * 4^TWPS)
397 #define TWI_FREQ 300000 /* 300 kHz */
398 #define TWI_PRESC 1 /* 4 ^ TWPS */
400 TWBR = (CLOCK_FREQ / (2 * TWI_FREQ * TWI_PRESC)) - (8 / TWI_PRESC);
404 ENABLE_IRQRESTORE(flags);
412 void eeprom_test(void)
414 static const char magic[13] = "Humpty Dumpty";
415 char buf[sizeof magic + 1];
418 // Write something to EEPROM using unaligned sequential writes
419 for (i = 0; i < 42; ++i)
420 eeprom_write(i * sizeof magic, magic, sizeof magic);
422 // Read back with single-byte reads
423 for (i = 0; i < 42 * sizeof magic; ++i)
425 eeprom_read(i, buf, 1);
426 kprintf("EEPROM byte read: %c (%d)\n", buf[0], buf[0]);
427 ASSERT(buf[0] == magic[i % sizeof magic]);
430 // Read back again using sequential reads
431 for (i = 0; i < 42; ++i)
433 memset(buf, 0, sizeof buf);
434 eeprom_read(i * sizeof magic, buf, sizeof magic);
435 kprintf("EEPROM seq read @ 0x%x: '%s'\n", i * sizeof magic, buf);
436 ASSERT(memcmp(buf, magic, sizeof magic) == 0);