4 * Copyright 2003, 2004 Develer S.r.l. (http://www.develer.com/)
10 * \author Stefano Fedrigo <aleph@develer.com>
11 * \author Bernardo Innocenti <bernie@develer.com>
13 * \brief Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation)
15 * \note This implementation is AVR specific.
20 * Revision 1.5 2004/08/24 13:46:48 bernie
23 * Revision 1.4 2004/08/10 06:57:22 bernie
24 * eeprom_erase(): New function.
26 * Revision 1.3 2004/07/29 22:57:09 bernie
29 * Revision 1.2 2004/07/22 01:24:43 bernie
30 * Document AVR dependency.
32 * Revision 1.1 2004/07/20 17:11:18 bernie
39 #include <mware/byteorder.h> /* cpu_to_be16() */
40 #include <drv/kdebug.h>
44 #include <string.h> // memset()
49 /* Wait for TWINT flag set: bus is ready */
50 #define WAIT_TWI_READY do {} while (!(TWCR & BV(TWINT)))
52 /*! \name EEPROM control codes */
60 * Send START condition on the bus.
62 * \return true on success, false otherwise.
64 static bool twi_start(void)
66 TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN);
69 if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START)
72 DB(kprintf("!TW_(REP)START: %x\n", TWSR);)
78 * Send START condition and select slave for write.
80 * \return true on success, false otherwise.
82 static bool twi_start_w(uint8_t slave_addr)
84 ASSERT(slave_addr < 8);
87 * Loop on the select write sequence: when the eeprom is busy
88 * writing previously sent data it will reply to the SLA_W
89 * control byte with a NACK. In this case, we must
90 * keep trying until the eeprom responds with an ACK.
94 TWDR = SLA_W | (slave_addr << 1);
95 TWCR = BV(TWINT) | BV(TWEN);
98 if (TW_STATUS == TW_MT_SLA_ACK)
100 else if (TW_STATUS != TW_MT_SLA_NACK)
102 DB(kprintf("!TW_MT_SLA_(N)ACK: %x\n", TWSR);)
112 * Send START condition and select slave for read.
114 * \return true on success, false otherwise.
116 static bool twi_start_r(uint8_t slave_addr)
118 ASSERT(slave_addr < 8);
122 TWDR = SLA_R | (slave_addr << 1);
123 TWCR = BV(TWINT) | BV(TWEN);
126 if (TW_STATUS == TW_MR_SLA_ACK)
129 DB(kprintf("!TW_MR_SLA_ACK: %x\n", TWSR);)
137 * Send STOP condition.
139 static void twi_stop(void)
141 TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO);
146 * Send a sequence of bytes in master transmitter mode
147 * to the selected slave device through the TWI bus.
149 * \return true on success, false on error.
151 static bool twi_send(const uint8_t *buf, size_t count)
156 TWCR = BV(TWINT) | BV(TWEN);
158 if (TW_STATUS != TW_MT_DATA_ACK)
160 DB(kprintf("!TW_MT_DATA_ACK: %x\n", TWSR);)
170 * Receive a sequence of one or more bytes from the
171 * selected slave device in master receive mode through
174 * Received data is placed in \c buf.
176 * \return true on success, false on error
178 static bool twi_recv(uint8_t *buf, size_t count)
181 * When reading the last byte the TWEA bit is not
182 * set, and the eeprom should answer with NACK
186 TWCR = BV(TWINT) | BV(TWEN) | (count ? BV(TWEA) : 0);
191 if (TW_STATUS != TW_MR_DATA_ACK)
193 DB(kprintf("!TW_MR_DATA_ACK: %x\n", TWSR);)
199 if (TW_STATUS != TW_MR_DATA_NACK)
201 DB(kprintf("!TW_MR_DATA_NACK: %x\n", TWSR);)
212 * Copy \c count bytes from buffer \c buf to
213 * eeprom at address \c addr.
215 bool eeprom_write(e2addr_t addr, const void *buf, size_t count)
218 ASSERT(addr + count <= EEPROM_SIZE);
220 while (count && result)
223 * Split write in multiple sequential mode operations that
224 * don't cross page boundaries.
227 MIN(count, (size_t)(EEPROM_BLKSIZE - (addr & (EEPROM_BLKSIZE - 1))));
229 #if CONFIG_EEPROM_TYPE == EEPROM_24XX16
231 * The 24LC16 uses the slave address as a 3-bit
234 uint8_t blk_addr = (uint8_t)((addr >> 8) & 0x07);
235 uint8_t blk_offs = (uint8_t)addr;
238 twi_start_w(blk_addr)
239 && twi_send(&blk_offs, sizeof blk_offs)
240 && twi_send(buf, size);
242 #elif CONFIG_EEPROM_TYPE == EEPROM_24XX256
244 // 24LC256 wants big-endian addresses
245 uint16_t addr_be = cpu_to_be16(addr);
249 && twi_send((uint8_t *)&addr_be, sizeof addr_be)
250 && twi_send(buf, size);
253 #error Unknown device type
259 //kprintf("addr=%d, count=%d, size=%d, *#?=%d\n",
260 // addr, count, size,
261 // (EEPROM_BLKSIZE - (addr & (EEPROM_BLKSIZE - 1)))
264 /* Update count and addr for next operation */
267 buf = ((const char *)buf) + size;
275 * Copy \c count bytes at address \c addr
276 * from eeprom to RAM to buffer \c buf.
278 bool eeprom_read(e2addr_t addr, void *buf, size_t count)
280 ASSERT(addr + count <= EEPROM_SIZE);
282 #if CONFIG_EEPROM_TYPE == EEPROM_24XX16
284 * The 24LC16 uses the slave address as a 3-bit
287 uint8_t blk_addr = (uint8_t)((addr >> 8) & 0x07);
288 uint8_t blk_offs = (uint8_t)addr;
291 twi_start_w(blk_addr)
292 && twi_send(&blk_offs, sizeof blk_offs)
293 && twi_start_r(blk_addr)
294 && twi_recv(buf, count);
296 #elif CONFIG_EEPROM_TYPE == EEPROM_24XX256
298 // 24LC256 wants big-endian addresses
299 addr = cpu_to_be16(addr);
303 && twi_send((uint8_t *)&addr, sizeof(addr))
305 && twi_recv(buf, count);
307 #error Unknown device type
317 * Write a single character \a c at address \a addr.
319 bool eeprom_write_char(e2addr_t addr, char c)
321 return eeprom_write(addr, &c, 1);
326 * Read a single character at address \a addr.
328 * \return the requested character or -1 in case of failure.
330 int eeprom_read_char(e2addr_t addr)
334 if (eeprom_read(addr, &c, 1))
342 * Erase specified part of eeprom, writing 0xFF.
344 * \param addr starting address
345 * \param len length of block to erase
347 void eeprom_erase(e2addr_t addr, size_t count)
349 uint8_t buf[EEPROM_BLKSIZE];
350 memset(buf, 0xFF, sizeof buf);
352 // Clear all but struct hw_info at start of eeprom
355 size_t size = MIN(count, sizeof buf);
356 eeprom_write(addr, buf, size);
364 * Initialize TWI module.
366 void eeprom_init(void)
369 DISABLE_IRQSAVE(flags);
371 #if defined(__AVR_ATmega64__)
372 PORTD |= BV(PD0) | BV(PD1);
373 DDRD |= BV(PD0) | BV(PD1);
374 #elif defined(__AVR_ATmega8__)
375 PORTC |= BV(PC4) | BV(PC5);
376 DDRC |= BV(PC4) | BV(PC5);
378 #error Unsupported architecture
383 * F = CLOCK_FREQ / (16 + 2*TWBR * 4^TWPS)
385 #define TWI_FREQ 300000 /* 300 kHz */
386 #define TWI_PRESC 1 /* 4 ^ TWPS */
388 TWBR = (CLOCK_FREQ / (2 * TWI_FREQ * TWI_PRESC)) - (8 / TWI_PRESC);
392 ENABLE_IRQRESTORE(flags);
400 void eeprom_test(void)
402 static const char magic[13] = "Humpty Dumpty";
403 char buf[sizeof magic + 1];
406 // Write something to EEPROM using unaligned sequential writes
407 for (i = 0; i < 42; ++i)
408 eeprom_write(i * sizeof magic, magic, sizeof magic);
410 // Read back with single-byte reads
411 for (i = 0; i < 42 * sizeof magic; ++i)
413 eeprom_read(i, buf, 1);
414 kprintf("EEPROM byte read: %c (%d)\n", buf[0], buf[0]);
415 ASSERT(buf[0] == magic[i % sizeof magic]);
418 // Read back again using sequential reads
419 for (i = 0; i < 42; ++i)
421 memset(buf, 0, sizeof buf);
422 eeprom_read(i * sizeof magic, buf, sizeof magic);
423 kprintf("EEPROM seq read @ 0x%x: '%s'\n", i * sizeof magic, buf);
424 ASSERT(memcmp(buf, magic, sizeof magic) == 0);