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33 * \brief EMAC driver for AT91SAM family with Davicom 9161A phy, interface.
35 * \author Daniele Basile <asterix@develer.com>
36 * \author Andrea Righi <arighi@develer.com>
37 * \author Stefano Fedrigo <aleph@develer.com>
43 #include <cpu/types.h>
45 #define EMAC_TX_BUFSIZ 1518 //!!! Don't change this
46 #define EMAC_TX_BUFFERS 1 //!!! Don't change this
47 #define EMAC_TX_DESCRIPTORS EMAC_TX_BUFFERS
49 #define EMAC_RX_BUFFERS 32 //!!! Don't change this
50 #define EMAC_RX_BUFSIZ 128 //!!! Don't change this
51 #define EMAC_RX_DESCRIPTORS EMAC_RX_BUFFERS
53 // Flag to manage local tx buffer
54 #define TXS_USED 0x80000000 //Used buffer.
55 #define TXS_WRAP 0x40000000 //Last descriptor.
56 #define TXS_ERROR 0x20000000 //Retry limit exceeded.
57 #define TXS_UNDERRUN 0x10000000 //Transmit underrun.
58 #define TXS_NO_BUFFER 0x08000000 //Buffer exhausted.
59 #define TXS_NO_CRC 0x00010000 //CRC not appended.
60 #define TXS_LAST_BUFF 0x00008000 //Last buffer of frame.
61 #define TXS_LENGTH_FRAME 0x000007FF // Length of frame including FCS.
63 // Flag to manage local rx buffer
64 #define RXBUF_OWNERSHIP 0x00000001
65 #define RXBUF_WRAP 0x00000002
67 #define BUF_ADDRMASK 0xFFFFFFFC
69 #define RXS_BROADCAST_ADDR 0x80000000 // Broadcast address detected.
70 #define RXS_MULTICAST_HASH 0x40000000 // Multicast hash match.
71 #define RXS_UNICAST_HASH 0x20000000 // Unicast hash match.
72 #define RXS_EXTERNAL_ADDR 0x10000000 // External address match.
73 #define RXS_SA1_ADDR 0x04000000 // Specific address register 1 match.
74 #define RXS_SA2_ADDR 0x02000000 // Specific address register 2 match.
75 #define RXS_SA3_ADDR 0x01000000 // Specific address register 3 match.
76 #define RXS_SA4_ADDR 0x00800000 // Specific address register 4 match.
77 #define RXS_TYPE_ID 0x00400000 // Type ID match.
78 #define RXS_VLAN_TAG 0x00200000 // VLAN tag detected.
79 #define RXS_PRIORITY_TAG 0x00100000 // Priority tag detected.
80 #define RXS_VLAN_PRIORITY 0x000E0000 // VLAN priority.
81 #define RXS_CFI_IND 0x00010000 // Concatenation format indicator.
82 #define RXS_EOF 0x00008000 // End of frame.
83 #define RXS_SOF 0x00004000 // Start of frame.
84 #define RXS_RBF_OFFSET 0x00003000 // Receive buffer offset mask.
85 #define RXS_LENGTH_FRAME 0x000007FF // Length of frame including FCS.
87 #define EMAC_RSR_BITS (BV(EMAC_BNA) | BV(EMAC_REC) | BV(EMAC_OVR))
88 #define EMAC_TSR_BITS (BV(EMAC_UBR) | BV(EMAC_COL) | BV(EMAC_RLES) | \
89 BV(EMAC_BEX) | BV(EMAC_COMP) | BV(EMAC_UND))
91 typedef struct BufDescriptor
93 volatile uint32_t addr;
94 volatile uint32_t stat;
97 #endif /* ETH_SAM3_H */