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29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief LM3S1968 GPIO control interface.
35 * \author Andrea Righi <arighi@develer.com>
38 #include <cfg/compiler.h>
39 #include <cfg/debug.h>
41 #include "gpio_lm3s.h"
44 * Configure a GPIO pin
46 * \param port Base address of the GPIO port
47 * \param pins Bit-packed representation of the pin(s)
48 * \param mode Pin(s) configuration mode
49 * \param strength Output drive strength
50 * \param type Pin(s) type
52 * Return 0 on success, otherwise a negative value.
54 int lm3s_gpio_pin_config(uint32_t port, uint8_t pins,
55 uint32_t mode, uint32_t strength, uint32_t type)
57 /* Set the pin direction and mode */
60 case GPIO_DIR_MODE_IN:
61 HWREG(port + GPIO_O_DIR) &= ~pins;
62 HWREG(port + GPIO_O_AFSEL) &= ~pins;
64 case GPIO_DIR_MODE_OUT:
65 HWREG(port + GPIO_O_DIR) |= pins;
66 HWREG(port + GPIO_O_AFSEL) &= ~pins;
68 case GPIO_DIR_MODE_HW:
69 HWREG(port + GPIO_O_DIR) &= ~pins;
70 HWREG(port + GPIO_O_AFSEL) |= pins;
76 /* Set the output strength */
79 case GPIO_STRENGTH_2MA:
80 HWREG(port + GPIO_O_DR2R) |= pins;
81 HWREG(port + GPIO_O_DR4R) &= ~pins;
82 HWREG(port + GPIO_O_DR8R) &= ~pins;
83 HWREG(port + GPIO_O_SLR) &= ~pins;
85 case GPIO_STRENGTH_4MA:
86 HWREG(port + GPIO_O_DR2R) &= ~pins;
87 HWREG(port + GPIO_O_DR4R) |= pins;
88 HWREG(port + GPIO_O_DR8R) &= ~pins;
89 HWREG(port + GPIO_O_SLR) &= ~pins;
91 case GPIO_STRENGTH_8MA:
92 HWREG(port + GPIO_O_DR2R) &= ~pins;
93 HWREG(port + GPIO_O_DR4R) &= ~pins;
94 HWREG(port + GPIO_O_DR8R) |= pins;
95 HWREG(port + GPIO_O_SLR) &= ~pins;
97 case GPIO_STRENGTH_8MA_SC:
98 HWREG(port + GPIO_O_DR2R) &= ~pins;
99 HWREG(port + GPIO_O_DR4R) &= ~pins;
100 HWREG(port + GPIO_O_DR8R) |= pins;
101 HWREG(port + GPIO_O_SLR) |= pins;
107 /* Set the pin type */
110 case GPIO_PIN_TYPE_STD:
111 HWREG(port + GPIO_O_ODR) &= ~pins;
112 HWREG(port + GPIO_O_PUR) &= ~pins;
113 HWREG(port + GPIO_O_PDR) &= ~pins;
114 HWREG(port + GPIO_O_DEN) |= pins;
115 HWREG(port + GPIO_O_AMSEL) &= ~pins;
117 case GPIO_PIN_TYPE_STD_WPU:
118 HWREG(port + GPIO_O_ODR) &= ~pins;
119 HWREG(port + GPIO_O_PUR) |= pins;
120 HWREG(port + GPIO_O_PDR) &= ~pins;
121 HWREG(port + GPIO_O_DEN) |= pins;
122 HWREG(port + GPIO_O_AMSEL) &= ~pins;
124 case GPIO_PIN_TYPE_STD_WPD:
125 HWREG(port + GPIO_O_ODR) &= ~pins;
126 HWREG(port + GPIO_O_PUR) &= ~pins;
127 HWREG(port + GPIO_O_PDR) |= pins;
128 HWREG(port + GPIO_O_DEN) |= pins;
129 HWREG(port + GPIO_O_AMSEL) &= ~pins;
131 case GPIO_PIN_TYPE_OD:
132 HWREG(port + GPIO_O_ODR) |= pins;
133 HWREG(port + GPIO_O_PUR) &= ~pins;
134 HWREG(port + GPIO_O_PDR) &= ~pins;
135 HWREG(port + GPIO_O_DEN) |= pins;
136 HWREG(port + GPIO_O_AMSEL) &= ~pins;
138 case GPIO_PIN_TYPE_OD_WPU:
139 HWREG(port + GPIO_O_ODR) |= pins;
140 HWREG(port + GPIO_O_PUR) |= pins;
141 HWREG(port + GPIO_O_PDR) &= ~pins;
142 HWREG(port + GPIO_O_DEN) |= pins;
143 HWREG(port + GPIO_O_AMSEL) &= ~pins;
145 case GPIO_PIN_TYPE_OD_WPD:
146 HWREG(port + GPIO_O_ODR) |= pins;
147 HWREG(port + GPIO_O_PUR) &= pins;
148 HWREG(port + GPIO_O_PDR) |= pins;
149 HWREG(port + GPIO_O_DEN) |= pins;
150 HWREG(port + GPIO_O_AMSEL) &= ~pins;
152 case GPIO_PIN_TYPE_ANALOG:
153 HWREG(port + GPIO_O_ODR) &= ~pins;
154 HWREG(port + GPIO_O_PUR) &= ~pins;
155 HWREG(port + GPIO_O_PDR) &= ~pins;
156 HWREG(port + GPIO_O_DEN) &= ~pins;
157 HWREG(port + GPIO_O_AMSEL) |= pins;