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29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief LM3S1968 GPIO control interface.
35 * \author Andrea Righi <arighi@develer.com>
39 #include "gpio_lm3s.h"
41 #include <cfg/compiler.h>
42 #include <cfg/debug.h>
47 /* Set the pin(s) direction and mode */
48 INLINE int lm3s_gpioPinConfigMode(uint32_t port, uint8_t pins, uint32_t mode)
50 if (mode == GPIO_DIR_MODE_IN)
52 HWREG(port + GPIO_O_DIR) &= ~pins;
53 HWREG(port + GPIO_O_AFSEL) &= ~pins;
55 else if (mode == GPIO_DIR_MODE_OUT)
57 HWREG(port + GPIO_O_DIR) |= pins;
58 HWREG(port + GPIO_O_AFSEL) &= ~pins;
60 else if (mode == GPIO_DIR_MODE_HW)
62 HWREG(port + GPIO_O_DIR) &= ~pins;
63 HWREG(port + GPIO_O_AFSEL) |= pins;
73 /* Set the pin(s) output strength */
75 lm3s_gpioPinConfigStrength(uint32_t port, uint8_t pins, uint32_t strength)
77 if (strength == GPIO_STRENGTH_2MA)
79 HWREG(port + GPIO_O_DR2R) |= pins;
80 HWREG(port + GPIO_O_DR4R) &= ~pins;
81 HWREG(port + GPIO_O_DR8R) &= ~pins;
82 HWREG(port + GPIO_O_SLR) &= ~pins;
84 else if (strength == GPIO_STRENGTH_4MA)
86 HWREG(port + GPIO_O_DR2R) &= ~pins;
87 HWREG(port + GPIO_O_DR4R) |= pins;
88 HWREG(port + GPIO_O_DR8R) &= ~pins;
89 HWREG(port + GPIO_O_SLR) &= ~pins;
91 else if (strength == GPIO_STRENGTH_8MA)
93 HWREG(port + GPIO_O_DR2R) &= ~pins;
94 HWREG(port + GPIO_O_DR4R) &= ~pins;
95 HWREG(port + GPIO_O_DR8R) |= pins;
96 HWREG(port + GPIO_O_SLR) &= ~pins;
98 else if (strength == GPIO_STRENGTH_8MA_SC)
100 HWREG(port + GPIO_O_DR2R) &= ~pins;
101 HWREG(port + GPIO_O_DR4R) &= ~pins;
102 HWREG(port + GPIO_O_DR8R) |= pins;
103 HWREG(port + GPIO_O_SLR) |= pins;
113 /* Set the pin(s) type */
114 INLINE int lm3s_gpioPinConfigType(uint32_t port, uint8_t pins, uint32_t type)
116 if (type == GPIO_PIN_TYPE_STD)
118 HWREG(port + GPIO_O_ODR) &= ~pins;
119 HWREG(port + GPIO_O_PUR) &= ~pins;
120 HWREG(port + GPIO_O_PDR) &= ~pins;
121 HWREG(port + GPIO_O_DEN) |= pins;
122 HWREG(port + GPIO_O_AMSEL) &= ~pins;
124 else if (type == GPIO_PIN_TYPE_STD_WPU)
126 HWREG(port + GPIO_O_ODR) &= ~pins;
127 HWREG(port + GPIO_O_PUR) |= pins;
128 HWREG(port + GPIO_O_PDR) &= ~pins;
129 HWREG(port + GPIO_O_DEN) |= pins;
130 HWREG(port + GPIO_O_AMSEL) &= ~pins;
132 else if (type == GPIO_PIN_TYPE_STD_WPD)
134 HWREG(port + GPIO_O_ODR) &= ~pins;
135 HWREG(port + GPIO_O_PUR) &= ~pins;
136 HWREG(port + GPIO_O_PDR) |= pins;
137 HWREG(port + GPIO_O_DEN) |= pins;
138 HWREG(port + GPIO_O_AMSEL) &= ~pins;
140 else if (type == GPIO_PIN_TYPE_OD)
142 HWREG(port + GPIO_O_ODR) |= pins;
143 HWREG(port + GPIO_O_PUR) &= ~pins;
144 HWREG(port + GPIO_O_PDR) &= ~pins;
145 HWREG(port + GPIO_O_DEN) |= pins;
146 HWREG(port + GPIO_O_AMSEL) &= ~pins;
148 else if (type == GPIO_PIN_TYPE_OD_WPU)
150 HWREG(port + GPIO_O_ODR) |= pins;
151 HWREG(port + GPIO_O_PUR) |= pins;
152 HWREG(port + GPIO_O_PDR) &= ~pins;
153 HWREG(port + GPIO_O_DEN) |= pins;
154 HWREG(port + GPIO_O_AMSEL) &= ~pins;
156 else if (type == GPIO_PIN_TYPE_OD_WPD)
158 HWREG(port + GPIO_O_ODR) |= pins;
159 HWREG(port + GPIO_O_PUR) &= pins;
160 HWREG(port + GPIO_O_PDR) |= pins;
161 HWREG(port + GPIO_O_DEN) |= pins;
162 HWREG(port + GPIO_O_AMSEL) &= ~pins;
164 else if (type == GPIO_PIN_TYPE_ANALOG)
166 HWREG(port + GPIO_O_ODR) &= ~pins;
167 HWREG(port + GPIO_O_PUR) &= ~pins;
168 HWREG(port + GPIO_O_PDR) &= ~pins;
169 HWREG(port + GPIO_O_DEN) &= ~pins;
170 HWREG(port + GPIO_O_AMSEL) |= pins;
181 * Configure a GPIO pin
183 * \param port Base address of the GPIO port
184 * \param pins Bit-packed representation of the pin(s)
185 * \param mode Pin(s) configuration mode
186 * \param strength Output drive strength
187 * \param type Pin(s) type
189 * Return 0 on success, otherwise a negative value.
191 int lm3s_gpioPinConfig(uint32_t port, uint8_t pins,
192 uint32_t mode, uint32_t strength, uint32_t type)
196 ret = lm3s_gpioPinConfigMode(port, pins, mode);
197 if (UNLIKELY(ret < 0))
199 ret = lm3s_gpioPinConfigStrength(port, pins, strength);
200 if (UNLIKELY(ret < 0))
202 ret = lm3s_gpioPinConfigType(port, pins, type);
203 if (UNLIKELY(ret < 0))