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29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief Atmel SAM3 enhanced embedded flash controller definitions.
40 * EEFC base register address.
42 #define EEFC_BASE 0x400E0A00
45 * EFC register offsets.
48 #define EEFC_FMR_OFF 0x0 ///< Flash Mode Register
49 #define EEFC_FCR_OFF 0x4 ///< Flash Command Register
50 #define EEFC_FSR_OFF 0x8 ///< Flash Status Register
51 #define EEFC_FRR_OFF 0xC ///< Flash Result Register
58 #define EEFC_FMR (*((reg32_t *)(EEFC_BASE + EEFC_FMR_OFF))) ///< Flash Mode Register
59 #define EEFC_FCR (*((reg32_t *)(EEFC_BASE + EEFC_FCR_OFF))) ///< Flash Command Register
60 #define EEFC_FSR (*((reg32_t *)(EEFC_BASE + EEFC_FSR_OFF))) ///< Flash Status Register
61 #define EEFC_FRR (*((reg32_t *)(EEFC_BASE + EEFC_FRR_OFF))) ///< Flash Result Register
67 * Defines for bit fields in EEFC_FMR register.
70 #define EEFC_FMR_FRDY 0 ///< Ready Interrupt Enable
71 #define EEFC_FMR_FWS_SHIFT 8
72 #define EEFC_FMR_FWS_MASK (0xf << EEFC_FMR_FWS_SHIFT) ///< Flash Wait State
73 #define EEFC_FMR_FWS(value) (EEFC_FMR_FWS_MASK & ((value) << EEFC_FMR_FWS_SHIFT))
74 #define EEFC_FMR_FAM 24 ///< Flash Access Mode
78 * Defines for bit fields in EEFC_FCR register.
81 #define EEFC_FCR_FCMD_MASK 0xff ///< Flash Command
82 #define EEFC_FCR_FCMD(value) (EEFC_FCR_FCMD_MASK & (value))
83 #define EEFC_FCR_FARG_SHIFT 8
84 #define EEFC_FCR_FARG_MASK (0xffff << EEFC_FCR_FARG_SHIFT) ///< Flash Command Argument
85 #define EEFC_FCR_FARG(value) (EEFC_FCR_FARG_MASK & ((value) << EEFC_FCR_FARG_SHIFT))
86 #define EEFC_FCR_FKEY_SHIFT 24
87 #define EEFC_FCR_FKEY_MASK (0xff << EEFC_FCR_FKEY_SHIFT) ///< Flash Writing Protection Key
88 #define EEFC_FCR_FKEY(value) (EEFC_FCR_FKEY_MASK & ((value) << EEFC_FCR_FKEY_SHIFT))
92 * Defines for bit fields in EEFC_FSR register.
95 #define EEFC_FSR_FRDY 0 ///< Flash Ready Status
96 #define EEFC_FSR_FCMDE 1 ///< Flash Command Error Status
97 #define EEFC_FSR_FLOCKE 2 ///< Flash Lock Error Status
100 #endif /* SAM3_FLASH_H */