4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2011 Develer S.r.l. (http://www.develer.com/)
33 * \author Daniele Basile <asterix@develer.com>
35 * SAM3X PDC register definitions.
43 * PDC controller offset
45 #define PERIPH_RPR_OFF 0x100 ///< Receive Pointer Register.
46 #define PERIPH_RCR_OFF 0x104 ///< Receive Counter Register.
47 #define PERIPH_TPR_OFF 0x108 ///< Transmit Pointer Register.
48 #define PERIPH_TCR_OFF 0x10C ///< Transmit Counter Register.
49 #define PERIPH_RNPR_OFF 0x110 ///< Receive Next Pointer Register.
50 #define PERIPH_RNCR_OFF 0x114 ///< Receive Next Counter Register.
51 #define PERIPH_TNPR_OFF 0x118 ///< Transmit Next Pointer Register.
52 #define PERIPH_TNCR_OFF 0x11C ///< Transmit Next Counter Register.
53 #define PERIPH_PTCR_OFF 0x120 ///< Transfer Control Register.
54 #define PERIPH_PTSR_OFF 0x124 ///< Transfer Status Register.
57 #define PDC_PTCR_RXTEN 0 ///< Receiver Transfer Enable.
58 #define PDC_PTCR_RXTDIS 1 ///< Receiver Transfer Disable.
59 #define PDC_PTCR_TXTEN 8 ///< Transmitter Transfer Enable.
60 #define PDC_PTCR_TXTDIS 9 ///< Transmitter Transfer Disable.
61 #define PDC_PTSR_RXTEN 0 ///< Receiver Transfer Enable.
62 #define PDC_PTSR_TXTEN 8 ///< Transmitter Transfer Enable.
65 #endif /* SAM3_PDC_H */