4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
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11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
30 * Copyright 2004 Giovanni Bajo
34 * \brief CPU-specific IRQ definitions.
36 * \author Giovanni Bajo <rasky@develer.com>
37 * \author Bernie Innocenti <bernie@codewiz.org>
38 * \author Stefano Fedrigo <aleph@develer.com>
39 * \author Francesco Sacchi <batt@develer.com>
47 #include <cfg/compiler.h> /* for uintXX_t */
50 #define IRQ_DISABLE disable_interrupt()
51 #define IRQ_ENABLE enable_interrupt()
54 /* Get IRQ_* definitions from the hosting environment. */
57 #define IRQ_DISABLE FIXME
58 #define IRQ_ENABLE FIXME
59 #define IRQ_SAVE_DISABLE(x) FIXME
60 #define IRQ_RESTORE(x) FIXME
61 #endif /* OS_EMBEDDED */
65 #ifdef __IAR_SYSTEMS_ICC__
69 #if __CPU_MODE__ == 1 /* Thumb */
71 extern cpuflags_t get_CPSR(void);
72 extern void set_CPSR(cpuflags_t flags);
74 #define get_CPSR __get_CPSR
75 #define set_CPSR __set_CPSR
78 #define IRQ_DISABLE __disable_interrupt()
79 #define IRQ_ENABLE __enable_interrupt()
81 #define IRQ_SAVE_DISABLE(x) \
84 __disable_interrupt(); \
87 #define IRQ_RESTORE(x) \
92 #define IRQ_ENABLED() \
93 ((bool)(get_CPSR() & 0xb0))
95 #define BREAKPOINT /* asm("bkpt 0") DOES NOT WORK */
97 #else /* !__IAR_SYSTEMS_ICC__ */
103 "orr r0, r0, #0xc0\n\t" \
113 "bic r0, r0, #0xc0\n\t" \
119 #define IRQ_SAVE_DISABLE(x) \
123 "orr r0, %0, #0xc0\n\t" \
131 #define IRQ_RESTORE(x) \
140 #define CPU_READ_FLAGS() \
151 #define IRQ_ENABLED() ((CPU_READ_FLAGS() & 0xc0) != 0xc0)
153 #endif /* !__IAR_SYSTEMS_ICC_ */
157 /* Get IRQ_* definitions from the hosting environment. */
160 #define IRQ_DISABLE FIXME
161 #define IRQ_ENABLE FIXME
162 #define IRQ_SAVE_DISABLE(x) FIXME
163 #define IRQ_RESTORE(x) FIXME
164 #define IRQ_ENABLED() FIXME
165 #endif /* OS_EMBEDDED */
169 #define BREAKPOINT asm(debug)
170 #define IRQ_DISABLE do { asm(bfset #0x0200,SR); asm(nop); } while (0)
171 #define IRQ_ENABLE do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
173 #define IRQ_SAVE_DISABLE(x) \
174 do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
175 #define IRQ_RESTORE(x) \
176 do { (void)x; asm(move x,SR); } while (0)
178 static inline bool irq_running(void)
180 extern void *user_sp;
183 #define IRQ_RUNNING() irq_running()
185 static inline bool irq_enabled(void)
189 return !(x & 0x0200);
191 #define IRQ_ENABLED() irq_enabled()
195 #define IRQ_DISABLE asm volatile ("cli" ::)
196 #define IRQ_ENABLE asm volatile ("sei" ::)
198 #define IRQ_SAVE_DISABLE(x) \
200 __asm__ __volatile__( \
201 "in %0,__SREG__\n\t" \
203 : "=r" (x) : /* no inputs */ : "cc" \
207 #define IRQ_RESTORE(x) \
209 __asm__ __volatile__( \
210 "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
214 #define IRQ_ENABLED() \
217 __asm__ __volatile__( \
218 "in %0,__SREG__\n\t" \
219 : "=r" (sreg) /* no inputs & no clobbers */ \
221 (bool)(sreg & 0x80); \
224 #error No CPU_... defined.
228 #define IRQ_ENTRY() /* NOP */
232 #define IRQ_EXIT() /* NOP */
237 * Execute \a CODE atomically with respect to interrupts.
239 * \see IRQ_SAVE_DISABLE IRQ_RESTORE
241 #define ATOMIC(CODE) \
243 cpuflags_t __flags; \
244 IRQ_SAVE_DISABLE(__flags); \
246 IRQ_RESTORE(__flags); \
251 #define BREAKPOINT /* nop */
255 #endif /* CPU_IRQ_H */