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29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief Cortex-M3 IRQ management.
35 * \author Andrea Righi <arighi@develer.com>
38 #include <cfg/debug.h> /* ASSERT() */
39 #include <cfg/log.h> /* LOG_ERR() */
44 static void (*irq_table[NUM_INTERRUPTS])(void)
45 __attribute__((section("vtable")));
48 static NAKED NORETURN void unhandled_isr(void)
50 register uint32_t reg;
52 asm volatile ("mrs %0, ipsr" : "=r"(reg));
53 LOG_ERR("unhandled IRQ %lu\n", reg);
58 void sysirq_setPriority(sysirq_t irq, int prio)
60 uint32_t pos = (irq & 3) * 8;
78 HWREG(reg) &= ~(0xff << pos);
79 HWREG(reg) |= prio << pos;
82 void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler)
86 ASSERT(irq < NUM_INTERRUPTS);
88 IRQ_SAVE_DISABLE(flags);
89 irq_table[irq] = handler;
90 sysirq_setPriority(irq, IRQ_PRIO);
94 void sysirq_freeHandler(sysirq_t irq)
98 ASSERT(irq < NUM_INTERRUPTS);
100 IRQ_SAVE_DISABLE(flags);
101 irq_table[irq] = unhandled_isr;
105 void sysirq_init(void)
110 IRQ_SAVE_DISABLE(flags);
111 for (i = 0; i < NUM_INTERRUPTS; i++)
112 irq_table[i] = unhandled_isr;
114 /* Update NVIC to point to the new vector table */
115 HWREG(NVIC_VTABLE) = (size_t)irq_table;