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29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief LM3S1968 Synchronous Serial Interface (SSI) driver.
39 #include <cpu/power.h> /* cpu_relax() */
40 #include <kern/kfile.h> /* KFile */
44 * LM3S1968 SSI frame format
47 #define SSI_FRF_MOTO_MODE_0 0x00000000 //< Moto fmt, polarity 0, phase 0
48 #define SSI_FRF_MOTO_MODE_1 0x00000002 //< Moto fmt, polarity 0, phase 1
49 #define SSI_FRF_MOTO_MODE_2 0x00000001 //< Moto fmt, polarity 1, phase 0
50 #define SSI_FRF_MOTO_MODE_3 0x00000003 //< Moto fmt, polarity 1, phase 1
51 #define SSI_FRF_TI 0x00000010 //< TI frame format
52 #define SSI_FRF_NMW 0x00000020 //< National MicroWire frame format
56 * LM3S1968 SSI operational mode
59 #define SSI_MODE_MASTER 0x00000000 //< SSI master
60 #define SSI_MODE_SLAVE 0x00000001 //< SSI slave
61 #define SSI_MODE_SLAVE_OD 0x00000002 //< SSI slave with output disabled
64 /* LM3S SSI handle properties */
67 /* Non-blocking I/O */
68 LM3S_SSI_NONBLOCK = 1,
71 /** LM3S1968 SSI handle structure */
72 typedef struct LM3SSSI
74 /* SSI Kfile structure */
77 /* Handle properties */
80 /* SSI port address */
87 #define KFT_LM3SSSI MAKE_ID('L', 'S', 'S', 'I')
89 INLINE LM3SSSI *LM3SSSI_CAST(KFile *fd)
91 ASSERT(fd->_type == KFT_LM3SSSI);
95 /* KFile interface to LM3S SSI */
96 void lm3s_ssiInit(struct LM3SSSI *fds, uint32_t addr, uint32_t frame, int mode,
97 int bitrate, uint32_t data_width);
99 /* Raw interface to LM3S SSI */
100 int lm3s_ssiOpen(uint32_t addr, uint32_t frame, int mode,
101 int bitrate, uint32_t data_width);
104 * Check if the SSI transmitter is busy or not
106 * This allows to determine whether the TX FIFO have been cleared by the
107 * hardware, so the transmission can be safely considered completed.
109 INLINE bool lm3s_ssiTxDone(uint32_t base)
111 return (HWREG(base + SSI_O_SR) & SSI_SR_BSY) ? true : false;
115 * Check if the SSI TX FIFO is full
117 INLINE bool lm3s_ssiTxReady(uint32_t base)
119 return (HWREG(base + SSI_O_SR) & SSI_SR_TNF) ? true : false;
123 * Check for data available in the RX FIFO
125 INLINE bool lm3s_ssiRxReady(uint32_t base)
127 return (HWREG(base + SSI_O_SR) & SSI_SR_RNE) ? true : false;
131 * Get a frame into the SSI receive FIFO without blocking.
133 * Return the number of frames read from the RX FIFO.
135 INLINE int lm3s_ssiReadFrameNonBlocking(uint32_t base, uint32_t *val)
137 /* Check for data available in the RX FIFO */
138 if (!lm3s_ssiRxReady(base))
140 /* Read data from SSI RX FIFO */
141 *val = HWREG(base + SSI_O_DR);
146 * Get a frame from the SSI receive FIFO.
148 INLINE void lm3s_ssiReadFrame(uint32_t base, uint32_t *val)
150 /* Wait for data available in the RX FIFO */
151 while (!lm3s_ssiRxReady(base))
153 /* Read data from SSI RX FIFO */
154 *val = HWREG(base + SSI_O_DR);
158 * Put a frame into the SSI transmit FIFO without blocking.
160 * NOTE: the upper bits of the frame will be automatically discarded by the
161 * hardware according to the frame data width.
163 * Return the number of frames written to the TX FIFO.
165 INLINE int lm3s_ssiWriteFrameNonBlocking(uint32_t base, uint32_t val)
167 /* Check for available space in the TX FIFO */
168 if (!lm3s_ssiTxReady(base))
170 /* Enqueue data to the TX FIFO */
171 HWREG(base + SSI_O_DR) = val;
176 * Put a frame into the SSI transmit FIFO.
178 * NOTE: the upper bits of the frame will be automatically discarded by the
179 * hardware according to the frame data width.
181 INLINE void lm3s_ssiWriteFrame(uint32_t base, uint32_t val)
183 /* Wait for available space in the TX FIFO */
184 while (!lm3s_ssiTxReady(base))
186 /* Enqueue data to the TX FIFO */
187 HWREG(base + SSI_O_DR) = val;
190 #endif /* SSI_LM3S_H */