4 * Copyright 2003, 2004 Develer S.r.l. (http://www.develer.com/)
5 * Copyright 2000 Bernardo Innocenti <bernie@develer.com>
6 * This file is part of DevLib - See devlib/README for information.
11 * \author Bernardo Innocenti <bernie@develer.com>
13 * \brief Low-level timer module for AVR
18 *#* Revision 1.17 2004/09/14 21:07:09 bernie
19 *#* Include hw.h explicitly.
21 *#* Revision 1.16 2004/09/06 21:49:26 bernie
22 *#* CONFIG_TIMER_STROBE: be tolerant with missing optional macro.
24 *#* Revision 1.15 2004/08/25 14:12:08 rasky
25 *#* Aggiornato il comment block dei log RCS
27 *#* Revision 1.14 2004/08/24 16:27:01 bernie
28 *#* Add missing headers.
30 *#* Revision 1.13 2004/08/24 14:30:11 bernie
31 *#* Use new-style config macros for drv/timer.c
33 *#* Revision 1.12 2004/08/10 06:59:45 bernie
34 *#* CONFIG_TIMER_STROBE: Define no-op default macros.
36 *#* Revision 1.11 2004/08/03 15:53:17 aleph
39 *#* Revision 1.10 2004/08/02 20:20:29 aleph
40 *#* Merge from project_ks
42 *#* Revision 1.9 2004/07/22 02:01:14 bernie
43 *#* Use TIMER_PRESCALER consistently.
45 #ifndef DRV_TIMER_AVR_H
46 #define DRV_TIMER_AVR_H
48 #include <arch_config.h> // ARCH_BOARD_KC
52 #include <avr/signal.h>
54 #if defined(ARCH_BOARD_KC) && (ARCH & ARCH_BOARD_KC)
60 * Values for CONFIG_TIMER.
62 * Select which hardware timer interrupt to use for system clock and softtimers.
63 * \note The timer 1 overflow mode set the timer as a 24 kHz PWM.
65 #define TIMER_ON_OUTPUT_COMPARE0 1
66 #define TIMER_ON_OVERFLOW1 2
67 #define TIMER_ON_OUTPUT_COMPARE2 3
71 * \def CONFIG_TIMER_STROBE
73 * This is a debug facility that can be used to
74 * monitor timer interrupt activity on an external pin.
76 * To use strobes, redefine the macros TIMER_STROBE_ON,
77 * TIMER_STROBE_OFF and TIMER_STROBE_INIT and set
78 * CONFIG_TIMER_STROBE to 1.
80 #if !defined(CONFIG_TIMER_STROBE) || !CONFIG_TIMER_STROBE
81 #define TIMER_STROBE_ON do {/*nop*/} while(0)
82 #define TIMER_STROBE_OFF do {/*nop*/} while(0)
83 #define TIMER_STROBE_INIT do {/*nop*/} while(0)
87 /* Not needed, IRQ timer flag cleared automatically */
88 #define timer_hw_irq() do {} while (0)
90 #define TIMER_PRESCALER 64
93 * System timer: additional division after the prescaler
94 * 12288000 / 64 / 192 (0..191) = 1 ms
96 #define OCR_DIVISOR (CLOCK_FREQ / TIMER_PRESCALER / TICKS_PER_SEC - 1) /* 191 */
98 /*! HW dependent timer initialization */
99 #if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0)
101 //! Type of time expressed in ticks of the hardware high-precision timer
102 typedef uint8_t hptime_t;
104 static void timer_hw_init(void)
107 DISABLE_IRQSAVE(flags);
109 /* Reset Timer flags */
110 TIFR = BV(OCF0) | BV(TOV0);
112 /* Setup Timer/Counter interrupt */
113 ASSR = 0x00; /* Internal system clock */
114 TCCR0 = BV(WGM01) /* Clear on Compare match */
115 #if TIMER_PRESCALER == 64
118 #error Unsupported value of TIMER_PRESCALER
121 TCNT0 = 0x00; /* Initialization of Timer/Counter */
122 OCR0 = OCR_DIVISOR; /* Timer/Counter Output Compare Register */
124 /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */
128 ENABLE_IRQRESTORE(flags);
131 //! Frequency of the hardware high precision timer
132 #define TIMER_HW_HPTICKS_PER_SEC (CLOCK_FREQ / TIMER_PRESCALER)
134 INLINE hptime_t timer_hw_hpread(void)
139 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1)
141 //! Type of time expressed in ticks of the hardware high precision timer
142 typedef uint16_t hptime_t;
144 static void timer_hw_init(void)
147 DISABLE_IRQSAVE(flags);
149 /* Reset Timer overflow flag */
152 /* Fast PWM mode, 9 bit, 24 kHz, no prescaling. When changing freq or
153 resolution (top of TCNT), change TIMER_HW_HPTICKS_PER_SEC too */
155 TCCR1A &= ~BV(WGM10);
156 TCCR1B |= BV(WGM12) | BV(CS10);
157 TCCR1B &= ~(BV(WGM13) | BV(CS11) | BV(CS12));
159 TCNT1 = 0x00; /* initialization of Timer/Counter */
161 /* Enable timer interrupt: Timer/Counter1 Overflow */
164 ENABLE_IRQRESTORE(flags);
167 //! Frequency of the hardware high precision timer
168 #define TIMER_HW_HPTICKS_PER_SEC (24000ul * 512)
170 INLINE hptime_t timer_hw_hpread(void)
175 #elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2)
177 //! Type of time expressed in ticks of the hardware high precision timer
178 typedef uint8_t hptime_t;
180 static void timer_hw_init(void)
183 DISABLE_IRQSAVE(flags);
185 /* Reset Timer flags */
186 TIFR = BV(OCF2) | BV(TOV2);
188 /* Setup Timer/Counter interrupt */
190 #if TIMER_PRESCALER == 64
191 | BV(CS21) | BV(CS20)
193 #error Unsupported value of TIMER_PRESCALER
196 /* Clear on Compare match & prescaler = 64, internal sys clock.
197 When changing prescaler change TIMER_HW_HPTICKS_PER_SEC too */
198 TCNT2 = 0x00; /* initialization of Timer/Counter */
199 OCR2 = OCR_DIVISOR; /* Timer/Counter Output Compare Register */
201 /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */
205 ENABLE_IRQRESTORE(flags);
208 //! Frequency of the hardware high precision timer
209 #define TIMER_HW_HPTICKS_PER_SEC (CLOCK_FREQ / TIMER_PRESCALER)
211 INLINE hptime_t timer_hw_hpread(void)
217 #error Unimplemented value for CONFIG_TIMER
218 #endif /* CONFIG_TIMER */
221 #if (CONFIG_TIMER == TIMER_ON_OVERFLOW1)
223 #define DEFINE_TIMER_ISR \
224 static void timer_handler(void)
229 * Timer 1 overflow irq handler. It's called at the frequency of the timer 1
230 * PWM (should be 24 kHz). It's too much for timer purposes, so the interrupt
231 * handler is really a counter that call the true handler in timer.c
234 SIGNAL(SIG_OVERFLOW1)
237 * How many overflow we have to count before calling the true timer handler.
238 * If timer overflow is at 24 kHz, with a value of 24 we have 1 ms between
241 #define TIMER1_OVF_COUNT 24
243 static uint8_t count = TIMER1_OVF_COUNT;
249 count = TIMER1_OVF_COUNT;
252 #if (ARCH & ARCH_BOARD_KC)
254 * Super-optimization-hack: switch CPU ADC mux here, ASAP after the start
255 * of conversion (auto-triggered with timer 1 overflow).
256 * The switch can be done 2 ADC cycles after start of conversion.
257 * The handler prologue takes a little more than 32 CPU cycles: with
258 * the prescaler at 1/16 the timing should be correct even at the start
261 * The switch is synchronized with the ADC handler using _adc_trigger_lock.
263 extern uint8_t _adc_idx_next;
264 extern bool _adc_trigger_lock;
266 if (!_adc_trigger_lock)
269 ADC_SETCHN(_adc_idx_next);
271 _adc_trigger_lock = true;
276 #elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0)
278 #define DEFINE_TIMER_ISR \
279 SIGNAL(SIG_OUTPUT_COMPARE0)
281 #elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2)
283 #define DEFINE_TIMER_ISR \
284 SIGNAL(SIG_OUTPUT_COMPARE2)
287 #error Unimplemented value for CONFIG_TIMER
288 #endif /* CONFIG_TIMER */
290 #endif /* DRV_TIMER_AVR_H */