4 * Copyright 2003, 2004, 2005 Develer S.r.l. (http://www.develer.com/)
5 * Copyright 2000 Bernardo Innocenti <bernie@develer.com>
6 * This file is part of DevLib - See README.devlib for information.
11 * \author Bernardo Innocenti <bernie@develer.com>
13 * \brief Low-level timer module for AVR
18 *#* Revision 1.24 2005/04/11 19:10:28 bernie
19 *#* Include top-level headers from cfg/ subdir.
21 *#* Revision 1.23 2005/03/01 23:24:51 bernie
22 *#* Tweaks for avr-libc 1.2.x.
24 *#* Revision 1.21 2004/12/13 12:07:06 bernie
25 *#* DISABLE_IRQSAVE/ENABLE_IRQRESTORE: Convert to IRQ_SAVE_DISABLE/IRQ_RESTORE.
27 *#* Revision 1.20 2004/11/16 20:59:46 bernie
28 *#* Include <avr/io.h> explicitly.
30 *#* Revision 1.19 2004/10/19 08:56:41 bernie
31 *#* TIMER_STROBE_ON, TIMER_STROBE_OFF, TIMER_STROBE_INIT: Move from timer_avr.h to timer.h, where they really belong.
33 *#* Revision 1.18 2004/09/20 03:31:03 bernie
34 *#* Fix racy racy code.
36 *#* Revision 1.17 2004/09/14 21:07:09 bernie
37 *#* Include hw.h explicitly.
39 *#* Revision 1.16 2004/09/06 21:49:26 bernie
40 *#* CONFIG_TIMER_STROBE: be tolerant with missing optional macro.
42 *#* Revision 1.15 2004/08/25 14:12:08 rasky
43 *#* Aggiornato il comment block dei log RCS
45 *#* Revision 1.14 2004/08/24 16:27:01 bernie
46 *#* Add missing headers.
48 *#* Revision 1.13 2004/08/24 14:30:11 bernie
49 *#* Use new-style config macros for drv/timer.c
51 *#* Revision 1.12 2004/08/10 06:59:45 bernie
52 *#* CONFIG_TIMER_STROBE: Define no-op default macros.
54 *#* Revision 1.11 2004/08/03 15:53:17 aleph
57 *#* Revision 1.10 2004/08/02 20:20:29 aleph
58 *#* Merge from project_ks
60 *#* Revision 1.9 2004/07/22 02:01:14 bernie
61 *#* Use TIMER_PRESCALER consistently.
63 #ifndef DRV_TIMER_AVR_H
64 #define DRV_TIMER_AVR_H
66 #include <cfg/arch_config.h> // ARCH_BOARD_KC
67 #include <cfg/macros.h> // BV()
70 #include <avr/signal.h>
73 #if defined(ARCH_BOARD_KC) && (ARCH & ARCH_BOARD_KC)
79 * Values for CONFIG_TIMER.
81 * Select which hardware timer interrupt to use for system clock and softtimers.
82 * \note The timer 1 overflow mode set the timer as a 24 kHz PWM.
84 #define TIMER_ON_OUTPUT_COMPARE0 1
85 #define TIMER_ON_OVERFLOW1 2
86 #define TIMER_ON_OUTPUT_COMPARE2 3
89 /* Not needed, IRQ timer flag cleared automatically */
90 #define timer_hw_irq() do {} while (0)
92 #define TIMER_PRESCALER 64
95 * System timer: additional division after the prescaler
96 * 12288000 / 64 / 192 (0..191) = 1 ms
98 #define OCR_DIVISOR (CLOCK_FREQ / TIMER_PRESCALER / TICKS_PER_SEC - 1) /* 191 */
100 /*! HW dependent timer initialization */
101 #if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0)
103 //! Type of time expressed in ticks of the hardware high-precision timer
104 typedef uint8_t hptime_t;
106 static void timer_hw_init(void)
109 IRQ_SAVE_DISABLE(flags);
111 /* Reset Timer flags */
112 TIFR = BV(OCF0) | BV(TOV0);
114 /* Setup Timer/Counter interrupt */
115 ASSR = 0x00; /* Internal system clock */
116 TCCR0 = BV(WGM01) /* Clear on Compare match */
117 #if TIMER_PRESCALER == 64
120 #error Unsupported value of TIMER_PRESCALER
123 TCNT0 = 0x00; /* Initialization of Timer/Counter */
124 OCR0 = OCR_DIVISOR; /* Timer/Counter Output Compare Register */
126 /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */
133 //! Frequency of the hardware high precision timer
134 #define TIMER_HW_HPTICKS_PER_SEC (CLOCK_FREQ / TIMER_PRESCALER)
136 INLINE hptime_t timer_hw_hpread(void)
141 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1)
143 //! Type of time expressed in ticks of the hardware high precision timer
144 typedef uint16_t hptime_t;
146 static void timer_hw_init(void)
149 IRQ_SAVE_DISABLE(flags);
151 /* Reset Timer overflow flag */
154 /* Fast PWM mode, 9 bit, 24 kHz, no prescaling. When changing freq or
155 resolution (top of TCNT), change TIMER_HW_HPTICKS_PER_SEC too */
157 TCCR1A &= ~BV(WGM10);
158 TCCR1B |= BV(WGM12) | BV(CS10);
159 TCCR1B &= ~(BV(WGM13) | BV(CS11) | BV(CS12));
161 TCNT1 = 0x00; /* initialization of Timer/Counter */
163 /* Enable timer interrupt: Timer/Counter1 Overflow */
169 //! Frequency of the hardware high precision timer
170 #define TIMER_HW_HPTICKS_PER_SEC (24000ul * 512)
172 INLINE hptime_t timer_hw_hpread(void)
177 #elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2)
179 //! Type of time expressed in ticks of the hardware high precision timer
180 typedef uint8_t hptime_t;
182 static void timer_hw_init(void)
185 IRQ_SAVE_DISABLE(flags);
187 /* Reset Timer flags */
188 TIFR = BV(OCF2) | BV(TOV2);
190 /* Setup Timer/Counter interrupt */
192 #if TIMER_PRESCALER == 64
193 | BV(CS21) | BV(CS20)
195 #error Unsupported value of TIMER_PRESCALER
198 /* Clear on Compare match & prescaler = 64, internal sys clock.
199 When changing prescaler change TIMER_HW_HPTICKS_PER_SEC too */
200 TCNT2 = 0x00; /* initialization of Timer/Counter */
201 OCR2 = OCR_DIVISOR; /* Timer/Counter Output Compare Register */
203 /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */
210 //! Frequency of the hardware high precision timer
211 #define TIMER_HW_HPTICKS_PER_SEC (CLOCK_FREQ / TIMER_PRESCALER)
213 INLINE hptime_t timer_hw_hpread(void)
219 #error Unimplemented value for CONFIG_TIMER
220 #endif /* CONFIG_TIMER */
223 #if (CONFIG_TIMER == TIMER_ON_OVERFLOW1)
225 #define DEFINE_TIMER_ISR \
226 static void timer_handler(void)
231 * Timer 1 overflow irq handler. It's called at the frequency of the timer 1
232 * PWM (should be 24 kHz). It's too much for timer purposes, so the interrupt
233 * handler is really a counter that call the true handler in timer.c
236 SIGNAL(SIG_OVERFLOW1)
238 #if (ARCH & ARCH_BOARD_KC)
240 * Super-optimization-hack: switch CPU ADC mux here, ASAP after the start
241 * of conversion (auto-triggered with timer 1 overflow).
242 * The switch can be done 2 ADC cycles after start of conversion.
243 * The handler prologue takes a little more than 32 CPU cycles: with
244 * the prescaler at 1/16 the timing should be correct even at the start
247 * The switch is synchronized with the ADC handler using _adc_trigger_lock.
249 * Mel (A Real Programmer)
251 extern uint8_t _adc_idx_next;
252 extern bool _adc_trigger_lock;
254 if (!_adc_trigger_lock)
256 // Backwards compatibility fix for avr-libc 1.0.4
262 * Disable free-running mode to avoid starting a
263 * new conversion before the ADC handler has read
264 * the ongoing one. This condition could occur
265 * under very high interrupt load and would have the
266 * unwanted effect of reading from the wrong ADC
269 * NOTE: writing 0 to ADSC and ADIF has no effect.
271 ADCSRA = ADCSRA & ~(BV(ADATE) | BV(ADIF) | BV(ADSC));
273 ADC_SETCHN(_adc_idx_next);
274 _adc_trigger_lock = true;
276 #endif // ARCH_BOARD_KC
279 * How many timer overflows we must count before calling the real
281 * When the timer is programmed to overflow at 24 kHz, a value of
282 * 24 will result in 1ms between each call.
284 #define TIMER1_OVF_COUNT 24
285 //#warning TIMER1_OVF_COUNT for timer at 12 kHz
286 //#define TIMER1_OVF_COUNT 12
288 static uint8_t count = TIMER1_OVF_COUNT;
294 count = TIMER1_OVF_COUNT;
298 #elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0)
300 #define DEFINE_TIMER_ISR \
301 SIGNAL(SIG_OUTPUT_COMPARE0)
303 #elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2)
305 #define DEFINE_TIMER_ISR \
306 SIGNAL(SIG_OUTPUT_COMPARE2)
309 #error Unimplemented value for CONFIG_TIMER
310 #endif /* CONFIG_TIMER */
312 #endif /* DRV_TIMER_AVR_H */