#include <cfg/macros.h> /* DIV_ROUND */
#include <cfg/debug.h>
+#include <cfg/cfg_arch.h> // ARCH_NIGHTTEST
#include <drv/ser.h>
#include <drv/ser_p.h>
* - as input but tied high forever!
* This driver set the pin as output.
*/
- #warning SPI SS pin set as output for proper operation, check schematics for possible conflicts.
+ #warning FIXME:SPI SS pin set as output for proper operation, check schematics for possible conflicts.
ATOMIC(SPI_DDR |= BV(SPI_SS_BIT));
ATOMIC(SPI_DDR &= ~BV(SPI_MISO_BIT));
#if CONFIG_SER_HWHANDSHAKE
/// This interrupt is triggered when the CTS line goes high
-SIGNAL(SIG_CTS)
+DECLARE_ISR(SIG_CTS)
{
// Re-enable UDR empty interrupt and TX, then disable CTS interrupt
UCSR0B = BV(BIT_RXCIE0) | BV(BIT_UDRIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0);
/**
* Serial 0 TX interrupt handler
*/
-SIGNAL(USART0_UDRE_vect)
+DECLARE_ISR(USART0_UDRE_vect)
{
SER_STROBE_ON;
* otherwise we'd stop the serial port with some data
* still pending in the buffer.
*/
-SIGNAL(SIG_UART0_TRANS)
+DECLARE_ISR(SIG_UART0_TRANS)
{
SER_STROBE_ON;
/**
* Serial 1 TX interrupt handler
*/
-SIGNAL(USART1_UDRE_vect)
+DECLARE_ISR(USART1_UDRE_vect)
{
SER_STROBE_ON;
*
* \sa port 0 TX complete handler.
*/
-SIGNAL(USART1_TX_vect)
+DECLARE_ISR(USART1_TX_vect)
{
SER_STROBE_ON;
* RXCIE is cleared. Unfortunately the RXC flag is read-only
* and can't be cleared by code.
*/
-SIGNAL(USART0_RX_vect)
+DECLARE_ISR(USART0_RX_vect)
{
SER_STROBE_ON;
* is heavily loaded, because an interrupt could be retriggered
* when executing the handler prologue before RXCIE is disabled.
*
- * \see SIGNAL(USART1_RX_vect)
+ * \see DECLARE_ISR(USART1_RX_vect)
*/
-SIGNAL(USART1_RX_vect)
+DECLARE_ISR(USART1_RX_vect)
{
SER_STROBE_ON;
/**
* SPI interrupt handler
*/
-SIGNAL(SIG_SPI)
+DECLARE_ISR(SIG_SPI)
{
SER_STROBE_ON;