* \author Andrea Righi <arighi@develer.com>
*/
+#include "irq_cm3.h"
+
#include <cfg/debug.h> /* ASSERT() */
#include <cfg/log.h> /* LOG_ERR() */
#include <cpu/irq.h>
-#include "irq_cm3.h"
+
+#ifdef __IAR_SYSTEMS_ICC__
+#pragma data_alignment=0x400
+static void (*irq_table[NUM_INTERRUPTS])(void);
+#else
static void (*irq_table[NUM_INTERRUPTS])(void)
__attribute__((section("vtable")));
+#endif
/* Priority register / IRQ number table */
static const uint32_t nvic_prio_reg[] =
{
register uint32_t reg;
+#ifdef __IAR_SYSTEMS_ICC__
+ reg = CPU_READ_IPSR();
+#else
asm volatile ("mrs %0, ipsr" : "=r"(reg));
+#endif
LOG_ERR("unhandled IRQ %lu\n", reg);
while (1)
PAUSE;
{
/* Enable the IRQ line (only for generic IRQs) */
if (irq >= 16 && irq < 48)
- HWREG(NVIC_EN0) = 1 << (irq - 16);
+ NVIC_EN0_R = 1 << (irq - 16);
else if (irq >= 48)
- HWREG(NVIC_EN1) = 1 << (irq - 48);
+ NVIC_EN1_R = 1 << (irq - 48);
}
void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler)
irq_table[i] = unhandled_isr;
/* Update NVIC to point to the new vector table */
- HWREG(NVIC_VTABLE) = (size_t)irq_table;
+ NVIC_VTABLE_R = (size_t)irq_table;
IRQ_RESTORE(flags);
}