.sysctl_gpio = RCC_APB2_GPIOA,
.sysctl_usart = RCC_APB1_USART2,
},
-#if CPU_CM3_STM32F103RB
+#if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
/* UART3 */
{
.base = GPIOB_BASE,
/* UART port instances */
UART_PORT(1)
UART_PORT(2)
-#if CPU_CM3_STM32F103RB
+#if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
UART_PORT(3)
#endif
.base = USART2_BASE,
.irq = USART2_IRQHANDLER,
},
-#if CPU_CM3_STM32F103RB
+#if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
{
.hw = {
.table = &USART3_VT,