#define CPU_CM3_LM3S8962 0
#endif
- #if defined (__ARM_STM32P103__)
+ #if defined (__ARM_STM32F103RB__)
#define CPU_CM3_STM32 1
- #define CPU_CM3_STM32P103 1
+ #define CPU_CM3_STM32F103RB 1
#else
- #define CPU_CM3_STM32P103 0
+ #define CPU_CM3_STM32F103RB 0
#endif
#if defined (CPU_CM3_LM3S)
#endif
#define CPU_CM3_STM32 0
#elif defined (CPU_CM3_STM32)
- #if CPU_CM3_STM32P103 + 0 != 1
+ #if CPU_CM3_STM32F103RB + 0 != 1
#error STM32 Cortex-M3 CPU configuration error
#endif
#define CPU_CM3_LM3S 0
#define CPU_CM3_STM32 0
- #define CPU_CM3_STM32P103 0
+ #define CPU_CM3_STM32F103RB 0
#endif
#if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
#define CPU_AVR_ATMEGA1281 0
#endif
+ #if defined(__AVR_ATmega1280__)
+ #define CPU_AVR_ATMEGA1280 1
+ #else
+ #define CPU_AVR_ATMEGA1280 0
+ #endif
+
#if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
- + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 != 1
+ + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 \
+ + CPU_AVR_ATMEGA1280 != 1
#error AVR CPU configuration error
#endif
#else
#define CPU_AVR_ATMEGA103 0
#define CPU_AVR_ATMEGA128 0
#define CPU_AVR_ATMEGA1281 0
+ #define CPU_AVR_ATMEGA1280 0
+#endif
+
+#if defined (__MSP430__)
+ #define CPU_MSP430 1
+ #define CPU_ID msp430
+
+ #if defined(__MSP430_2274__)
+ #define CPU_MSP430_2274 1
+ #else
+ #define CPU_MSP430_2274 0
+ #endif
+#else
+ #define CPU_MSP430 0
#endif
/* Self-check for the detection: only one CPU must be detected */
-#if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR == 0
+#if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 == 0
#error Unknown CPU
#elif !defined(CPU_ID)
#error CPU_ID not defined
-#elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR != 1
+#elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 != 1
#error Internal CPU configuration error
#endif