#define CPU_ARM_AT91SAM7X256 0
#endif
+ #if defined (__ARM_LM3S1968__)
+ #define CPU_ARM_LM3S 1
+ #define CPU_ARM_LM3S1968 1
+ #else
+ #define CPU_ARM_LM3S1968 0
+ #endif
+
+
#if defined(CPU_ARM_AT91)
#if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
+ CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 != 1
#error ARM CPU configuration error
#endif
+ #define CPU_ARM_LM3S 0
+ #elif defined (CPU_ARM_LM3S)
+ #if CPU_ARM_LM3S1968 + 0 != 1
+ #error Luminary ARM CPU configuration error
+ #endif
+ #define CPU_ARM_AT91 0
/* #elif Add other ARM families here */
#else
- #define CPU_ATM_AT91 0
+ #define CPU_ARM_AT91 0
+ #define CPU_ARM_LM3S 0
#endif
- #if CPU_ARM_AT91 + 0 /* Add other ARM families here */ != 1
+ #if CPU_ARM_AT91 + CPU_ARM_LM3S + 0 /* Add other ARM families here */ != 1
#error ARM CPU configuration error
#endif
#else
/* ARM Families */
#define CPU_ARM_AT91 0
+ #define CPU_ARM_LM3S 0
/* ARM CPUs */
#define CPU_ARM_AT91SAM7S32 0
#define CPU_ARM_AT91SAM7S256 0
#define CPU_ARM_AT91SAM7X128 0
#define CPU_ARM_AT91SAM7X256 0
+
+ #define CPU_ARM_LM3S1968 0
#endif
#if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
#define CPU_AVR 1
#define CPU_ID avr
+ #if defined(__AVR_ATmega32__)
+ #define CPU_AVR_ATMEGA32 1
+ #else
+ #define CPU_AVR_ATMEGA32 0
+ #endif
+
#if defined(__AVR_ATmega64__)
#define CPU_AVR_ATMEGA64 1
#else
#define CPU_AVR_ATMEGA1281 0
#endif
- #if CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
+ #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
+ CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA1281 != 1
#error AVR CPU configuration error
#endif
#define CPU_AVR 0
#define CPU_AVR_ATMEGA8 0
#define CPU_AVR_ATMEGA168 0
+ #define CPU_AVR_ATMEGA32 0
#define CPU_AVR_ATMEGA64 0
#define CPU_AVR_ATMEGA103 0
#define CPU_AVR_ATMEGA128 0