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Fix undefined behaviour.
[bertos.git]
/
bertos
/
cpu
/
arm
/
drv
/
adc_at91.c
diff --git
a/bertos/cpu/arm/drv/adc_at91.c
b/bertos/cpu/arm/drv/adc_at91.c
index dbeb6117ffbc57e7da78be8bd5913e376bd30310..66d0bde9c2335c66417e1d6b25d888c2171ede8e 100644
(file)
--- a/
bertos/cpu/arm/drv/adc_at91.c
+++ b/
bertos/cpu/arm/drv/adc_at91.c
@@
-40,15
+40,17
@@
* whit a loop the finishing of conversion.
*
*
* whit a loop the finishing of conversion.
*
*
- * \version $Id$
* \author Daniele Basile <asterix@develer.com>
*/
#include "adc_at91.h"
* \author Daniele Basile <asterix@develer.com>
*/
#include "adc_at91.h"
+#include <cpu/irq.h>
+
#include "cfg/cfg_adc.h"
#include "cfg/cfg_adc.h"
-#include "cfg/cfg_kern.h"
+#include "cfg/cfg_proc.h"
+#include "cfg/cfg_signal.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <cfg/compiler.h>
@@
-61,7
+63,7
@@
#include <io/arm.h>
#include <io/arm.h>
-#if CONFIG_KERN
EL
+#if CONFIG_KERN
#include <cfg/module.h>
#include <kern/proc.h>
#include <kern/signal.h>
#include <cfg/module.h>
#include <kern/proc.h>
#include <kern/signal.h>
@@
-81,9
+83,9
@@
* ADC ISR.
* Simply signal the adc process that convertion is complete.
*/
* ADC ISR.
* Simply signal the adc process that convertion is complete.
*/
- static
void ISR_FUNC adc_conversion_end_irq(void
)
+ static
DECLARE_ISR(adc_conversion_end_irq
)
{
{
- sig_
signal
(adc_process, SIG_ADC_COMPLETE);
+ sig_
post
(adc_process, SIG_ADC_COMPLETE);
/* Inform hw that we have served the IRQ */
AIC_EOICR = 0;
/* Inform hw that we have served the IRQ */
AIC_EOICR = 0;
@@
-104,14
+106,14
@@
ADC_IER = BV(ADC_DRDY);
}
ADC_IER = BV(ADC_DRDY);
}
-#endif /* CONFIG_KERN
EL
*/
+#endif /* CONFIG_KERN */
/**
* Select mux channel \a ch.
* \todo only first 8 channels are selectable!
*/
/**
* Select mux channel \a ch.
* \todo only first 8 channels are selectable!
*/
-
INLINE
void adc_hw_select_ch(uint8_t ch)
+void adc_hw_select_ch(uint8_t ch)
{
//Disable all channels
ADC_CHDR = ADC_CH_MASK;
{
//Disable all channels
ADC_CHDR = ADC_CH_MASK;
@@
-123,36
+125,42
@@
INLINE void adc_hw_select_ch(uint8_t ch)
/**
* Start an ADC convertion.
* If a kernel is present, preempt until convertion is complete, otherwise
/**
* Start an ADC convertion.
* If a kernel is present, preempt until convertion is complete, otherwise
- * a busy wait on ADC
S
bit is done.
+ * a busy wait on ADC
_DRDY
bit is done.
*/
*/
-
INLINE
uint16_t adc_hw_read(void)
+uint16_t adc_hw_read(void)
{
{
- ASSERT(!(ADC_SR & ADC_EOC_MASK));
-
- #if CONFIG_KERNEL
+ #if CONFIG_KERN
+ /* Ensure ADC is not already in use by another process */
+ ASSERT(adc_process == NULL);
adc_process = proc_current();
#endif
// Start convertion
ADC_CR = BV(ADC_START);
adc_process = proc_current();
#endif
// Start convertion
ADC_CR = BV(ADC_START);
- #if CONFIG_KERN
EL
+ #if CONFIG_KERN
// Ensure IRQs enabled.
// Ensure IRQs enabled.
-
ASSERT(IRQ_ENABLED()
);
+
IRQ_ASSERT_ENABLED(
);
sig_wait(SIG_ADC_COMPLETE);
sig_wait(SIG_ADC_COMPLETE);
+
+ /* Prevent race condition in case of preemptive kernel */
+ uint16_t ret = ADC_LCDR;
+ MEMORY_BARRIER;
+ adc_process = NULL;
+ return ret;
#else
//Wait in polling until is done
while (!(ADC_SR & BV(ADC_DRDY)));
#else
//Wait in polling until is done
while (!(ADC_SR & BV(ADC_DRDY)));
- #endif
- //Return the last converted data
- return(ADC_LCDR);
+ //Return the last converted data
+ return(ADC_LCDR);
+ #endif
}
/**
* Init ADC hardware.
*/
}
/**
* Init ADC hardware.
*/
-
INLINE
void adc_hw_init(void)
+void adc_hw_init(void)
{
//Init ADC pins.
ADC_INIT_PINS();
{
//Init ADC pins.
ADC_INIT_PINS();
@@
-175,6
+183,7
@@
INLINE void adc_hw_init(void)
#endif
/* \} */
#endif
/* \} */
+ LOG_INFO("Computed ADC_CLOCK %ld\n", ADC_COMPUTED_CLOCK);
LOG_INFO("prescaler[%ld], stup[%ld], shtim[%ld]\n",ADC_COMPUTED_PRESCALER, ADC_COMPUTED_STARTUPTIME, ADC_COMPUTED_SHTIME);
LOG_INFO("prescaler[%ld], stup[%ld], shtim[%ld]\n",ADC_COMPUTED_PRESCALER, ADC_COMPUTED_STARTUPTIME, ADC_COMPUTED_SHTIME);
@@
-193,7
+202,7
@@
INLINE void adc_hw_init(void)
ADC_MR |= ((ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK);
LOG_INFO("shtime[%ld]\n", (ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK);
ADC_MR |= ((ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK);
LOG_INFO("shtime[%ld]\n", (ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK);
- #if CONFIG_KERN
EL
+ #if CONFIG_KERN
//Register and enable irq for adc.
adc_enable_irq();
#endif
//Register and enable irq for adc.
adc_enable_irq();
#endif