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Reformat.
[bertos.git]
/
bertos
/
cpu
/
arm
/
drv
/
adc_at91.c
diff --git
a/bertos/cpu/arm/drv/adc_at91.c
b/bertos/cpu/arm/drv/adc_at91.c
index dbeb6117ffbc57e7da78be8bd5913e376bd30310..bb6a8d11ffd1409fe86d557a86d31e6d233714f1 100644
(file)
--- a/
bertos/cpu/arm/drv/adc_at91.c
+++ b/
bertos/cpu/arm/drv/adc_at91.c
@@
-47,8
+47,11
@@
#include "adc_at91.h"
#include "adc_at91.h"
+#include <cpu/irq.h>
+
#include "cfg/cfg_adc.h"
#include "cfg/cfg_adc.h"
-#include "cfg/cfg_kern.h"
+#include "cfg/cfg_proc.h"
+#include "cfg/cfg_signal.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <cfg/compiler.h>
@@
-61,7
+64,7
@@
#include <io/arm.h>
#include <io/arm.h>
-#if CONFIG_KERN
EL
+#if CONFIG_KERN
#include <cfg/module.h>
#include <kern/proc.h>
#include <kern/signal.h>
#include <cfg/module.h>
#include <kern/proc.h>
#include <kern/signal.h>
@@
-104,14
+107,14
@@
ADC_IER = BV(ADC_DRDY);
}
ADC_IER = BV(ADC_DRDY);
}
-#endif /* CONFIG_KERN
EL
*/
+#endif /* CONFIG_KERN */
/**
* Select mux channel \a ch.
* \todo only first 8 channels are selectable!
*/
/**
* Select mux channel \a ch.
* \todo only first 8 channels are selectable!
*/
-
INLINE
void adc_hw_select_ch(uint8_t ch)
+void adc_hw_select_ch(uint8_t ch)
{
//Disable all channels
ADC_CHDR = ADC_CH_MASK;
{
//Disable all channels
ADC_CHDR = ADC_CH_MASK;
@@
-125,20
+128,20
@@
INLINE void adc_hw_select_ch(uint8_t ch)
* If a kernel is present, preempt until convertion is complete, otherwise
* a busy wait on ADCS bit is done.
*/
* If a kernel is present, preempt until convertion is complete, otherwise
* a busy wait on ADCS bit is done.
*/
-
INLINE
uint16_t adc_hw_read(void)
+uint16_t adc_hw_read(void)
{
ASSERT(!(ADC_SR & ADC_EOC_MASK));
{
ASSERT(!(ADC_SR & ADC_EOC_MASK));
- #if CONFIG_KERN
EL
+ #if CONFIG_KERN
adc_process = proc_current();
#endif
// Start convertion
ADC_CR = BV(ADC_START);
adc_process = proc_current();
#endif
// Start convertion
ADC_CR = BV(ADC_START);
- #if CONFIG_KERN
EL
+ #if CONFIG_KERN
// Ensure IRQs enabled.
// Ensure IRQs enabled.
-
ASSERT(IRQ_ENABLED()
);
+
IRQ_ASSERT_ENABLED(
);
sig_wait(SIG_ADC_COMPLETE);
#else
//Wait in polling until is done
sig_wait(SIG_ADC_COMPLETE);
#else
//Wait in polling until is done
@@
-152,7
+155,7
@@
INLINE uint16_t adc_hw_read(void)
/**
* Init ADC hardware.
*/
/**
* Init ADC hardware.
*/
-
INLINE
void adc_hw_init(void)
+void adc_hw_init(void)
{
//Init ADC pins.
ADC_INIT_PINS();
{
//Init ADC pins.
ADC_INIT_PINS();
@@
-193,7
+196,7
@@
INLINE void adc_hw_init(void)
ADC_MR |= ((ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK);
LOG_INFO("shtime[%ld]\n", (ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK);
ADC_MR |= ((ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK);
LOG_INFO("shtime[%ld]\n", (ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK);
- #if CONFIG_KERN
EL
+ #if CONFIG_KERN
//Register and enable irq for adc.
adc_enable_irq();
#endif
//Register and enable irq for adc.
adc_enable_irq();
#endif