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Remove the idle process.
[bertos.git]
/
bertos
/
cpu
/
arm
/
drv
/
pwm_at91.c
diff --git
a/bertos/cpu/arm/drv/pwm_at91.c
b/bertos/cpu/arm/drv/pwm_at91.c
index 76a53d398482aa88e0a4dee9a57dc7279235d84c..a95e60613fa6d0e5e8140735f24d468eec0ecc79 100644
(file)
--- a/
bertos/cpu/arm/drv/pwm_at91.c
+++ b/
bertos/cpu/arm/drv/pwm_at91.c
@@
-34,13
+34,18
@@
* \brief PWM hardware-specific implementation
*
* \version $Id$
* \brief PWM hardware-specific implementation
*
* \version $Id$
- *
* \author Daniele Basile <asterix@develer.com>
*/
#include "pwm_at91.h"
#include "hw/pwm_map.h"
* \author Daniele Basile <asterix@develer.com>
*/
#include "pwm_at91.h"
#include "hw/pwm_map.h"
-#include "hw/hw_cpu.h"
+#include <hw/hw_cpufreq.h>
+#include "cfg/cfg_pwm.h"
+
+// Define logging setting (for cfg/log.h module).
+#define LOG_LEVEL PWM_LOG_LEVEL
+#define LOG_FORMAT PWM_LOG_FORMAT
+#include <cfg/log.h>
#include <cfg/macros.h>
#include <cfg/debug.h>
#include <cfg/macros.h>
#include <cfg/debug.h>
@@
-115,8
+120,8
@@
void pwm_hw_setFrequency(PwmDev dev, uint32_t freq)
for(int i = 0; i <= PWM_HW_MAX_PRESCALER_STEP; i++)
{
for(int i = 0; i <= PWM_HW_MAX_PRESCALER_STEP; i++)
{
- period = C
LOCK
_FREQ / (BV(i) * freq);
-//
TRACEMSG("period[%ld], prescale[%d]
", period, i);
+ period = C
PU
_FREQ / (BV(i) * freq);
+//
LOG_INFO("period[%ld], prescale[%d]\n
", period, i);
if ((period < PWM_HW_MAX_PERIOD) && (period != 0))
{
//Clean previous channel prescaler, and set new
if ((period < PWM_HW_MAX_PERIOD) && (period != 0))
{
//Clean previous channel prescaler, and set new
@@
-128,7
+133,7
@@
void pwm_hw_setFrequency(PwmDev dev, uint32_t freq)
}
}
}
}
-
TRACEMSG("PWM ch[%d] period[%ld]
", dev, period);
+
LOG_INFO("PWM ch[%d] period[%ld]\n
", dev, period);
}
/**
}
/**
@@
-152,15
+157,14
@@
void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty)
}
else
{
}
else
{
- ASSERT(PWM_CCNT0);
- /*
+ /*
* If polarity flag is true we must invert
* PWM polarity.
*/
if (pwm_map[dev].pol)
{
* If polarity flag is true we must invert
* PWM polarity.
*/
if (pwm_map[dev].pol)
{
- duty = (uint16_t)*pwm_map[dev].period_reg - duty;
-
// TRACEMSG("Inverted duty[%d], pol[%d]
", duty, pwm_map[dev].pol);
+
duty = (uint16_t)*pwm_map[dev].period_reg - duty;
+
LOG_INFO("Inverted duty[%d], pol[%d]\n
", duty, pwm_map[dev].pol);
}
PWM_PIO_PDR = pwm_map[dev].pwm_pin;
}
PWM_PIO_PDR = pwm_map[dev].pwm_pin;
@@
-170,7
+174,7
@@
void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty)
PWM_ENA = BV(dev);
PWM_ENA = BV(dev);
-
// TRACEMSG("PWM ch[%d] duty[%d], period[%ld]
", dev, duty, *pwm_map[dev].period_reg);
+
LOG_INFO("PWM ch[%d] duty[%d], period[%ld]\n
", dev, duty, *pwm_map[dev].period_reg);
}
}
@@
-196,8
+200,8
@@
void pwm_hw_disable(PwmDev dev)
*/
void pwm_hw_setPolarity(PwmDev dev, bool pol)
{
*/
void pwm_hw_setPolarity(PwmDev dev, bool pol)
{
- pwm_map[dev].pol = pol;
-
// TRACEMSG("Set pol[%d]
", pwm_map[dev].pol);
+
pwm_map[dev].pol = pol;
+
LOG_INFO("Set pol[%d]\n
", pwm_map[dev].pol);
}
/**
}
/**