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Clean up. Reformat.
[bertos.git]
/
bertos
/
cpu
/
arm
/
hw
/
crtat91sam7_rom.S
diff --git
a/bertos/cpu/arm/hw/crtat91sam7_rom.S
b/bertos/cpu/arm/hw/crtat91sam7_rom.S
index 9bd9d46c48941d56660442a1fad22e3d451e1000..51635fde4cb36b16a6ff32297bfea069d8989182 100644
(file)
--- a/
bertos/cpu/arm/hw/crtat91sam7_rom.S
+++ b/
bertos/cpu/arm/hw/crtat91sam7_rom.S
@@
-30,7
+30,6
@@
*
* -->
*
*
* -->
*
- * \version $Id: $
*
* \author Francesco Sacchi <batt@develer.com>
*
*
* \author Francesco Sacchi <batt@develer.com>
*
@@
-74,18
+73,18
@@
#include "cfg/cfg_arch.h"
#include "cfg/cfg_arch.h"
-#if CPU_FREQ != 480
23000
L
+#if CPU_FREQ != 480
54857
L
/* Avoid errors on nightly test */
#if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST)
/* Avoid errors on nightly test */
#if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST)
- #warning Clock registers set for 48.0
23
MHz operation, revise following code if you want a different clock.
+ #warning Clock registers set for 48.0
55
MHz operation, revise following code if you want a different clock.
#endif
#endif
#if CPU_ARM_SAM7S_LARGE || CPU_ARM_SAM7X
/*
#endif
#endif
#if CPU_ARM_SAM7S_LARGE || CPU_ARM_SAM7X
/*
- * With a 18.4
20
MHz cristal, master clock is:
- * (((18.4
20 * PLL_MUL_VAL + 1) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.023
MHz
+ * With a 18.4
32
MHz cristal, master clock is:
+ * (((18.4
32 * (PLL_MUL_VAL + 1)) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.055
MHz
*/
#define PLL_MUL_VAL 72 /**< Real multiplier value is PLL_MUL_VAL + 1! */
#define PLL_DIV_VAL 14
*/
#define PLL_MUL_VAL 72 /**< Real multiplier value is PLL_MUL_VAL + 1! */
#define PLL_DIV_VAL 14