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Make kfile_test global variables static in order to avoid name overlap.
[bertos.git]
/
bertos
/
cpu
/
arm
/
hw
/
init_at91.c
diff --git
a/bertos/cpu/arm/hw/init_at91.c
b/bertos/cpu/arm/hw/init_at91.c
index 1bba1c223e044aaceecb5ebe4570b7ecef5cc186..fc7ffaf47ed265935de926ce8ec61d98e89ccf3a 100644
(file)
--- a/
bertos/cpu/arm/hw/init_at91.c
+++ b/
bertos/cpu/arm/hw/init_at91.c
@@
-41,19
+41,19
@@
#define USE_FIXED_PLL 1
#define USE_FIXED_PLL 1
-#define XTAL_FREQ 184
20
000UL
+#define XTAL_FREQ 184
32
000UL
#if USE_FIXED_PLL
#if USE_FIXED_PLL
- #if CPU_FREQ != 480
23000
L
+ #if CPU_FREQ != 480
54857
L
/* Avoid errors on nightly test */
#if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST)
/* Avoid errors on nightly test */
#if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST)
- #warning Clock registers set for 48.0
23
MHz operation, revise following code if you want a different clock.
+ #warning Clock registers set for 48.0
55
MHz operation, revise following code if you want a different clock.
#endif
#endif
/*
#endif
#endif
/*
- * With a 18.4
20
MHz cristal, master clock is:
- * (((18.4
20 * PLL_MUL_VAL + 1) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.023
MHz
+ * With a 18.4
32
MHz cristal, master clock is:
+ * (((18.4
32 * (PLL_MUL_VAL + 1)) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.055
MHz
*/
#define PLL_MUL_VAL 72 /**< Real multiplier value is PLL_MUL_VAL + 1! */
#define PLL_DIV_VAL 14
*/
#define PLL_MUL_VAL 72 /**< Real multiplier value is PLL_MUL_VAL + 1! */
#define PLL_DIV_VAL 14