ldr pc, _swi /* Software interrupt */
ldr pc, _prefetch_abort /* Prefetch abort */
ldr pc, _data_abort /* Data abort */
ldr pc, _swi /* Software interrupt */
ldr pc, _prefetch_abort /* Prefetch abort */
ldr pc, _data_abort /* Data abort */
#warning Check correct VICAddress register for this CPU, default set to 0xFFFFF030
ldr pc, [pc, #-0xFF0] /* Use VIC */
#endif
#warning Check correct VICAddress register for this CPU, default set to 0xFFFFF030
ldr pc, [pc, #-0xFF0] /* Use VIC */
#endif