-
-#if CPU_DSP56K
- /*
- * DSP56k pushes both PC and SR to the stack in the JSR instruction, but
- * RTS discards SR while returning (it does not restore it). So we push
- * 0 to fake the same context.
- */
- #define CPU_PUSH_CALL_CONTEXT(sp, func) \
- do { \
- CPU_PUSH_WORD((sp), (func)); \
- CPU_PUSH_WORD((sp), 0x100); \
- } while (0);
-
-#elif CPU_AVR
- /*
- * In AVR, the addresses are pushed into the stack as little-endian, while
- * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
- * no natural endianess).
- */
- #define CPU_PUSH_CALL_CONTEXT(sp, func) \
- do { \
- uint16_t funcaddr = (uint16_t)(func); \
- CPU_PUSH_WORD((sp), funcaddr); \
- CPU_PUSH_WORD((sp), funcaddr>>8); \
- } while (0)
-
- /*
- * If the kernel is in idle-spinning, the processor executes:
- *
- * IRQ_ENABLE;
- * CPU_IDLE;
- * IRQ_DISABLE;
- *
- * IRQ_ENABLE is translated in asm as "sei" and IRQ_DISABLE as "cli".
- * We could define CPU_IDLE to expand to none, so the resulting
- * asm code would be:
- *
- * sei;
- * cli;
- *
- * But Atmel datasheet states:
- * "When using the SEI instruction to enable interrupts,
- * the instruction following SEI will be executed *before*
- * any pending interrupts", so "cli" is executed before any
- * pending interrupt with the result that IRQs will *NOT*
- * be enabled!
- * To ensure that IRQ will run a NOP is required.
- */
- #define CPU_IDLE NOP
-
-#else
- #define CPU_PUSH_CALL_CONTEXT(sp, func) \
- CPU_PUSH_WORD((sp), (cpustack_t)(func))