* Index (CPU_SAVED_REGS_CNT - 1) is the CPSR register,
* the initial value is set to:
* - All flags (N, Z, C, V) set to 0.
* - IRQ and FIQ enabled.
* - ARM state.
* - CPU in Supervisor Mode (SVC).
* Index (CPU_SAVED_REGS_CNT - 1) is the CPSR register,
* the initial value is set to:
* - All flags (N, Z, C, V) set to 0.
* - IRQ and FIQ enabled.
* - ARM state.
* - CPU in Supervisor Mode (SVC).