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doc: Add further documentation for fatfile_open().
[bertos.git]
/
bertos
/
cpu
/
avr
/
drv
/
adc_avr.c
diff --git
a/bertos/cpu/avr/drv/adc_avr.c
b/bertos/cpu/avr/drv/adc_avr.c
index 942345a7466538e03a7c13a7a4b57896828afb8d..20aa2a192de4144c4c1634516d9f7f2ebf8a9da1 100644
(file)
--- a/
bertos/cpu/avr/drv/adc_avr.c
+++ b/
bertos/cpu/avr/drv/adc_avr.c
@@
-33,23
+33,39
@@
*
* \version $Id$
* \author Francesco Sacchi <batt@develer.com>
*
* \version $Id$
* \author Francesco Sacchi <batt@develer.com>
+ *
+ * This module is automatically included so no need to include
+ * in test list.
+ * notest: avr
+ *
+ * $WIZ$
*/
#include "adc_avr.h"
#include "cfg/cfg_adc.h"
*/
#include "adc_avr.h"
#include "cfg/cfg_adc.h"
-#include "cfg/cfg_kern.h"
+#include "cfg/cfg_proc.h"
+#include "cfg/cfg_signal.h"
#include <cfg/macros.h>
#include <cfg/compiler.h>
#include <cfg/macros.h>
#include <cfg/compiler.h>
+#include <cpu/irq.h> // IRQ_ASSERT_ENABLED()
+
#include <drv/adc.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#include <drv/adc.h>
#include <avr/io.h>
#include <avr/interrupt.h>
+/**
+ * ADC voltage referencese.
+ *
+ * $WIZ$ avr_adc_refs = "ADC_AVR_AREF", "ADC_AVR_AVCC", "ADC_AVR_INT256"
+ * \{
+ */
#define ADC_AVR_AREF 0
#define ADC_AVR_AVCC 1
#define ADC_AVR_INT256 2
#define ADC_AVR_AREF 0
#define ADC_AVR_AVCC 1
#define ADC_AVR_INT256 2
+/* \} */
#if CONFIG_KERN
#include <cfg/module.h>
#if CONFIG_KERN
#include <cfg/module.h>
@@
-58,7
+74,7
@@
#if !CONFIG_KERN_SIGNALS
#if !CONFIG_KERN_SIGNALS
- #error Signals must be active to use ADC with kernel
+ #error Signals must be active to use
the
ADC with kernel
#endif
/* Signal adc convertion end */
#endif
/* Signal adc convertion end */
@@
-81,10
+97,10
@@
* Select mux channel \a ch.
* \todo only first 8 channels are selectable!
*/
* Select mux channel \a ch.
* \todo only first 8 channels are selectable!
*/
-
INLINE
void adc_hw_select_ch(uint8_t ch)
+void adc_hw_select_ch(uint8_t ch)
{
/* Set to 0 all mux registers */
{
/* Set to 0 all mux registers */
- ADMUX &= ~(BV(MUX
3
) | BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
+ ADMUX &= ~(BV(MUX
4
) | BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
/* Select channel, only first 8 channel modes are supported for now */
ADMUX |= (ch & 0x07);
/* Select channel, only first 8 channel modes are supported for now */
ADMUX |= (ch & 0x07);
@@
-96,7
+112,7
@@
INLINE void adc_hw_select_ch(uint8_t ch)
* If a kernel is present, preempt until convertion is complete, otherwise
* a busy wait on ADCS bit is done.
*/
* If a kernel is present, preempt until convertion is complete, otherwise
* a busy wait on ADCS bit is done.
*/
-
INLINE
uint16_t adc_hw_read(void)
+uint16_t adc_hw_read(void)
{
// Ensure another convertion is not running.
ASSERT(!(ADCSRA & BV(ADSC)));
{
// Ensure another convertion is not running.
ASSERT(!(ADCSRA & BV(ADSC)));
@@
-106,7
+122,7
@@
INLINE uint16_t adc_hw_read(void)
#if CONFIG_KERN
// Ensure IRQs enabled.
#if CONFIG_KERN
// Ensure IRQs enabled.
-
ASSERT(IRQ_ENABLED()
);
+
IRQ_ASSERT_ENABLED(
);
adc_process = proc_current();
sig_wait(SIG_ADC_COMPLETE);
#else
adc_process = proc_current();
sig_wait(SIG_ADC_COMPLETE);
#else
@@
-120,7
+136,7
@@
INLINE uint16_t adc_hw_read(void)
/**
* Init ADC hardware.
*/
/**
* Init ADC hardware.
*/
-
INLINE
void adc_hw_init(void)
+void adc_hw_init(void)
{
/*
* Select channel 0 as default,
{
/*
* Select channel 0 as default,
@@
-141,8
+157,10
@@
INLINE void adc_hw_init(void)
#error Unsupported ADC ref value.
#endif
#error Unsupported ADC ref value.
#endif
+ #if defined(ADCSRB)
/* Disable Auto trigger source: ADC in Free running mode. */
ADCSRB = 0;
/* Disable Auto trigger source: ADC in Free running mode. */
ADCSRB = 0;
+ #endif
/* Enable ADC, disable autotrigger mode. */
ADCSRA = BV(ADEN);
/* Enable ADC, disable autotrigger mode. */
ADCSRA = BV(ADEN);