- * \version $Id$
- * \author Bernie Innocenti <bernie@codewiz.org>
- * \author Stefano Fedrigo <aleph@develer.com>
- * \author Francesco Sacchi <batt@develer.com>
- */
-
-#include "hw/hw_cpu.h" /* for CLOCK_FREQ */
-#include "hw/hw_ser.h" /* Required for bus macros overrides */
-
-#include "cfg/cfg_debug.h"
-#include <cfg/macros.h> /* for BV(), DIV_ROUND */
-
-#include <cpu/types.h>
-#include <cpu/attr.h>
-
-#include <avr/io.h>
-
-#if CONFIG_KDEBUG_PORT == 0
-
- /*
- * Support for special bus policies or external transceivers
- * on UART0 (to be overridden in "hw/hw_ser.h").
- *
- * HACK: if we don't set TXEN, kdbg disables the transmitter
- * after each output statement until the serial driver
- * is initialized. These glitches confuse the debug
- * terminal that ends up printing some trash.
- */
- #ifndef KDBG_UART0_BUS_INIT
- #define KDBG_UART0_BUS_INIT do { \
- UCR = BV(TXEN0); \
- } while (0)
- #endif
- #ifndef KDBG_UART0_BUS_RX
- #define KDBG_UART0_BUS_RX do {} while (0)
- #endif
- #ifndef KDBG_UART0_BUS_TX
- #define KDBG_UART0_BUS_TX do {} while (0)
- #endif
-
- #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168
- #define UCR UCSR0B
- #define UDR UDR0
- #define USR UCSR0A
- #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32
- #define UCR UCSRB
- #define USR UCSRA
- #define TXEN0 TXEN
- #define UDRE0 UDRE
- #define TXC0 TXC
- #define TXCIE0 TXCIE
- #define UDRIE0 UDRIE
- #else
- #error Unknown CPU
- #endif
-
- #define KDBG_WAIT_READY() do { loop_until_bit_is_set(USR, UDRE0); } while(0)
- #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(USR, TXC0); } while(0)
-
- /*
- * We must clear the TXC flag before sending a new character to allow
- * KDBG_WAIT_TXDONE() to work properly.
- *
- * BUG: if KDBG_WRITE_CHAR() is called after the TXC flag is set by hardware,
- * a new TXC could be generated after we've cleared it and before the new
- * character is written to UDR. On a 485 bus, the transceiver will be put
- * in RX mode while still transmitting the last char.
- */
- #define KDBG_WRITE_CHAR(c) do { USR |= BV(TXC0); UDR = (c); } while(0)
-
- #define KDBG_MASK_IRQ(old) do { \
- (old) = UCR; \
- UCR |= BV(TXEN0); \
- UCR &= ~(BV(TXCIE0) | BV(UDRIE0)); \
- KDBG_UART0_BUS_TX; \
- } while(0)
-
- #define KDBG_RESTORE_IRQ(old) do { \
- KDBG_WAIT_TXDONE(); \
- KDBG_UART0_BUS_RX; \
- UCR = (old); \
- } while(0)
-
- typedef uint8_t kdbg_irqsave_t;
-
-#elif CONFIG_KDEBUG_PORT == 1
-
- /*
- * Support for special bus policies or external transceivers
- * on UART1 (to be overridden in "hw/hw_ser.h").
- *
- * HACK: if we don't set TXEN, kdbg disables the transmitter
- * after each output statement until the serial driver
- * is initialized. These glitches confuse the debug
- * terminal that ends up printing some trash.
- */
- #ifndef KDBG_UART1_BUS_INIT
- #define KDBG_UART1_BUS_INIT do { \
- UCSR1B = BV(TXEN1); \
- } while (0)
- #endif
- #ifndef KDBG_UART1_BUS_RX
- #define KDBG_UART1_BUS_RX do {} while (0)
- #endif
- #ifndef KDBG_UART1_BUS_TX
- #define KDBG_UART1_BUS_TX do {} while (0)
- #endif
-
- #define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR1A, UDRE1); } while(0)
- #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR1A, TXC1); } while(0)
- #define KDBG_WRITE_CHAR(c) do { UCSR1A |= BV(TXC1); UDR1 = (c); } while(0)
-
- #define KDBG_MASK_IRQ(old) do { \
- (old) = UCSR1B; \
- UCSR1B |= BV(TXEN1); \
- UCSR1B &= ~(BV(TXCIE1) | BV(UDRIE1)); \
- KDBG_UART1_BUS_TX; \
- } while(0)
-
- #define KDBG_RESTORE_IRQ(old) do { \
- KDBG_WAIT_TXDONE(); \
- KDBG_UART1_BUS_RX; \
- UCSR1B = (old); \
- } while(0)
-
- typedef uint8_t kdbg_irqsave_t;
-
-/*
- * Special debug port for BitBanged Serial see below for details...