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Clean up. Add set polarity prototype.
[bertos.git]
/
bertos
/
cpu
/
avr
/
drv
/
timer_avr.c
diff --git
a/bertos/cpu/avr/drv/timer_avr.c
b/bertos/cpu/avr/drv/timer_avr.c
index 291f205d9115b27ad72e9152ab3de713c725cb46..1ef5caec801ee67ae7dec43a9ec0d4ecc7fcabee 100644
(file)
--- a/
bertos/cpu/avr/drv/timer_avr.c
+++ b/
bertos/cpu/avr/drv/timer_avr.c
@@
-26,7
+26,7
@@
* invalidate any other reasons why the executable file might be covered by
* the GNU General Public License.
*
* invalidate any other reasons why the executable file might be covered by
* the GNU General Public License.
*
- * Copyright 2005 Develer S.r.l. (http://www.develer.com/)
+ * Copyright 2005
, 2010
Develer S.r.l. (http://www.develer.com/)
*
* -->
*
*
* -->
*
@@
-34,6
+34,7
@@
*
* \author Bernie Innocenti <bernie@codewiz.org>
* \author Francesco Sacchi <batt@develer.com>
*
* \author Bernie Innocenti <bernie@codewiz.org>
* \author Francesco Sacchi <batt@develer.com>
+ * \author Luca Ottaviano <lottaviano@develer.com>
*
* \brief Low-level timer module for AVR (implementation).
*
*
* \brief Low-level timer module for AVR (implementation).
*
@@
-48,15
+49,22
@@
#include <cpu/types.h>
#include <cpu/irq.h>
#include <cpu/types.h>
#include <cpu/irq.h>
-#include <avr/interrupt.h>
#include <avr/io.h>
#include <avr/io.h>
-#if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168
+#if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168
|| CPU_AVR_ATMEGA328P
#define REG_TIFR0 TIFR0
#define REG_TIFR0 TIFR0
+ #define REG_TIFR1 TIFR1
#define REG_TIFR2 TIFR2
#define REG_TIFR2 TIFR2
+ #if CPU_AVR_ATMEGA1281
+ #define REG_TIFR3 TIFR3
+ #endif
#define REG_TIMSK0 TIMSK0
#define REG_TIMSK0 TIMSK0
+ #define REG_TIMSK1 TIMSK1
#define REG_TIMSK2 TIMSK2
#define REG_TIMSK2 TIMSK2
+ #if CPU_AVR_ATMEGA1281
+ #define REG_TIMSK3 TIMSK3
+ #endif
#define REG_TCCR0A TCCR0A
#define REG_TCCR0B TCCR0B
#define REG_TCCR0A TCCR0A
#define REG_TCCR0B TCCR0B
@@
-74,10
+82,13
@@
#define BIT_OCIE2A OCIE2A
#else
#define REG_TIFR0 TIFR
#define BIT_OCIE2A OCIE2A
#else
#define REG_TIFR0 TIFR
+ #define REG_TIFR1 TIFR
#define REG_TIFR2 TIFR
#define REG_TIMSK0 TIMSK
#define REG_TIFR2 TIFR
#define REG_TIMSK0 TIMSK
+ #define REG_TIMSK1 TIMSK
#define REG_TIMSK2 TIMSK
#define REG_TIMSK2 TIMSK
+ #define REG_TIMSK3 ETIMSK
#define REG_TCCR0A TCCR0
#define REG_TCCR0B TCCR0
#define REG_TCCR0A TCCR0
#define REG_TCCR0B TCCR0
@@
-107,7
+118,7
@@
/** HW dependent timer initialization */
#if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0)
/** HW dependent timer initialization */
#if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0)
-
static
void timer_hw_init(void)
+ void timer_hw_init(void)
{
cpu_flags_t flags;
IRQ_SAVE_DISABLE(flags);
{
cpu_flags_t flags;
IRQ_SAVE_DISABLE(flags);
@@
-138,20
+149,15
@@
IRQ_RESTORE(flags);
}
IRQ_RESTORE(flags);
}
- INLINE hptime_t timer_hw_hpread(void)
- {
- return TCNT0;
- }
-
#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1)
#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1)
-
static
void timer_hw_init(void)
+ void timer_hw_init(void)
{
cpu_flags_t flags;
IRQ_SAVE_DISABLE(flags);
/* Reset Timer overflow flag */
{
cpu_flags_t flags;
IRQ_SAVE_DISABLE(flags);
/* Reset Timer overflow flag */
- REG_TIFR
0
|= BV(TOV1);
+ REG_TIFR
1
|= BV(TOV1);
/* Fast PWM mode, 9 bit, 24 kHz, no prescaling. */
#if (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 9)
/* Fast PWM mode, 9 bit, 24 kHz, no prescaling. */
#if (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 9)
@@
-172,18
+178,13
@@
TCNT1 = 0x00; /* initialization of Timer/Counter */
/* Enable timer interrupt: Timer/Counter1 Overflow */
TCNT1 = 0x00; /* initialization of Timer/Counter */
/* Enable timer interrupt: Timer/Counter1 Overflow */
- REG_TIMSK
0
|= BV(TOIE1);
+ REG_TIMSK
1
|= BV(TOIE1);
IRQ_RESTORE(flags);
}
IRQ_RESTORE(flags);
}
- INLINE hptime_t timer_hw_hpread(void)
- {
- return TCNT1;
- }
-
#elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2)
#elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2)
-
static
void timer_hw_init(void)
+ void timer_hw_init(void)
{
cpu_flags_t flags;
IRQ_SAVE_DISABLE(flags);
{
cpu_flags_t flags;
IRQ_SAVE_DISABLE(flags);
@@
-214,19
+215,15
@@
IRQ_RESTORE(flags);
}
IRQ_RESTORE(flags);
}
- INLINE hptime_t timer_hw_hpread(void)
- {
- return TCNT2;
- }
#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3)
#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3)
-
static
void timer_hw_init(void)
+ void timer_hw_init(void)
{
cpu_flags_t flags;
IRQ_SAVE_DISABLE(flags);
/* Reset Timer overflow flag */
{
cpu_flags_t flags;
IRQ_SAVE_DISABLE(flags);
/* Reset Timer overflow flag */
-
TIFR
|= BV(TOV3);
+
REG_TIFR3
|= BV(TOV3);
/* Fast PWM mode, 9 bit, 24 kHz, no prescaling. */
#if (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 9)
/* Fast PWM mode, 9 bit, 24 kHz, no prescaling. */
#if (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 9)
@@
-244,20
+241,15
@@
#error Unsupported value of TIMER_PRESCALER or TIMER_HW_BITS
#endif
#error Unsupported value of TIMER_PRESCALER or TIMER_HW_BITS
#endif
- TCNT3 = 0x00; /* initialization of Timer/Counter */
+ /* initialization of Timer/Counter */
+ TCNT3 = 0x00;
/* Enable timer interrupt: Timer/Counter3 Overflow */
/* Enable timer interrupt: Timer/Counter3 Overflow */
- /* ATTENTION! TOIE3 is only on ETIMSK, not TIMSK */
- ETIMSK |= BV(TOIE3);
+ REG_TIMSK3 = |= BV(TOIE3);
IRQ_RESTORE(flags);
}
IRQ_RESTORE(flags);
}
- INLINE hptime_t timer_hw_hpread(void)
- {
- return TCNT3;
- }
-
#else
#error Unimplemented value for CONFIG_TIMER
#endif /* CONFIG_TIMER */
#else
#error Unimplemented value for CONFIG_TIMER
#endif /* CONFIG_TIMER */