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Clean up. Reformat.
[bertos.git]
/
bertos
/
cpu
/
avr
/
drv
/
timer_mega.c
diff --git
a/bertos/cpu/avr/drv/timer_mega.c
b/bertos/cpu/avr/drv/timer_mega.c
index d6e88d21718e575ecb39db3ec8280e1fb644fd66..8b76045462a717c3c63866e0ed25025b674057be 100644
(file)
--- a/
bertos/cpu/avr/drv/timer_mega.c
+++ b/
bertos/cpu/avr/drv/timer_mega.c
@@
-126,8
+126,6
@@
REG_TIFR0 = BV(BIT_OCF0A) | BV(TOV0);
/* Setup Timer/Counter interrupt */
REG_TIFR0 = BV(BIT_OCF0A) | BV(TOV0);
/* Setup Timer/Counter interrupt */
- ASSR = 0x00; /* Internal system clock */
-
REG_TCCR0A = 0; // TCCR2 reg could be separate or a unique register with both A & B values, this is needed to
REG_TCCR0B = 0;
REG_TCCR0A = 0; // TCCR2 reg could be separate or a unique register with both A & B values, this is needed to
REG_TCCR0B = 0;