+ /* Disable watchdog */
+ WDT_MR = BV(WDT_WDDIS);
+
+#if CPU_CM3_SAM3X
+ /* Set wait states for flash access, needed for higher CPU clock rates */
+ EEFC0_FMR = EEFC_FMR_FWS(2);
+ EEFC1_FMR = EEFC_FMR_FWS(2);
+#else
+ EEFC0_FMR = EEFC_FMR_FWS(3);
+
+ // TODO: check if this is needed in sam3n-ek too, very slow start-up