+
+ hsmci_setBlockSize(blk_size);
+
+ //init DMAC
+ DMAC_EBCIDR = 0x3FFFFF;
+ DMAC_CHDR = 0x1F;
+ DMAC_CFG0 = BV(DMAC_CFG_DST_H2SEL) | DMAC_CFG_FIFOCFG_ALAP_CFG | (0x1 << DMAC_CFG_AHB_PROT_SHIFT);
+
+ pmc_periphEnable(DMAC_ID);
+ DMAC_EN = BV(DMAC_EN_ENABLE);
+ sysirq_setHandler(INT_DMAC, dmac_irq);
+
+ DMAC_EBCIER = BV(DMAC_EBCIER_BTC0) | BV(DMAC_EBCIER_ERR0);
+
+
+ DMAC_CHDR = BV(DMAC_CHDR_DIS0);
+
+ DMAC_SADDR0 = (uint32_t)buf;
+ DMAC_DADDR0 = (uint32_t)&HSMCI_TDR;
+ DMAC_DSCR0 = 0;
+
+ DMAC_CTRLA0 = (word_num & DMAC_CTRLA_BTSIZE_MASK) |
+ DMAC_CTRLA_SRC_WIDTH_WORD | DMAC_CTRLA_DST_WIDTH_WORD;
+ DMAC_CTRLB0 = (BV(DMAC_CTRLB_SRC_DSCR) | BV(DMAC_CTRLB_DST_DSCR) | DMAC_CTRLB_FC_MEM2PER_DMA_FC |
+ DMAC_CTRLB_DST_INCR_FIXED | DMAC_CTRLB_SRC_INCR_INCREMENTING | BV(DMAC_CTRLB_IEN));
+
+ kprintf("SDDR %08lx\n", DMAC_SADDR0);
+ kprintf("DDDR %08lx\n", DMAC_DADDR0);
+ kprintf("CTRA %08lx\n", DMAC_CTRLA0);
+ kprintf("CTRB %08lx\n", DMAC_CTRLB0);
+ kprintf("EBCI %08lx\n", DMAC_EBCISR);
+ kprintf("CHSR %08lx\n", DMAC_CHSR);
+