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sam3 pmc: add functions to handle peripheral clock enable/disable;
[bertos.git]
/
bertos
/
cpu
/
cortex-m3
/
drv
/
kdebug_sam3.c
diff --git
a/bertos/cpu/cortex-m3/drv/kdebug_sam3.c
b/bertos/cpu/cortex-m3/drv/kdebug_sam3.c
index d2b0cd81b99a1a363708be3dcee0b78a702320a0..5297d6026135cd2d7e0d4c2e8908bd3b5854aa52 100644
(file)
--- a/
bertos/cpu/cortex-m3/drv/kdebug_sam3.c
+++ b/
bertos/cpu/cortex-m3/drv/kdebug_sam3.c
@@
-82,7
+82,7
@@
INLINE void kdbg_hw_init(void)
PIO_PERIPH_SEL(UART_PIO_BASE, UART_PINS, UART_PERIPH);
/* Enable the peripheral clock */
PIO_PERIPH_SEL(UART_PIO_BASE, UART_PINS, UART_PERIPH);
/* Enable the peripheral clock */
-
PMC_PCER = BV
(UART_ID);
+
pmc_periphEnable
(UART_ID);
/* Reset and disable receiver & transmitter */
HWREG(UART_BASE + UART_CR_OFF) = BV(UART_CR_RSTRX) | BV(UART_CR_RSTTX) | BV(UART_CR_RXDIS) | BV(UART_CR_TXDIS);
/* Reset and disable receiver & transmitter */
HWREG(UART_BASE + UART_CR_OFF) = BV(UART_CR_RSTRX) | BV(UART_CR_RSTTX) | BV(UART_CR_RXDIS) | BV(UART_CR_TXDIS);