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AT91SAM7: add EMAC ethernet driver
[bertos.git]
/
bertos
/
cpu
/
cortex-m3
/
drv
/
kdebug_sam3.c
diff --git
a/bertos/cpu/cortex-m3/drv/kdebug_sam3.c
b/bertos/cpu/cortex-m3/drv/kdebug_sam3.c
index e3472395dbd36295aa377bcbd291e1d0bbeca780..9cfe143f0f595cdd06737394a8630fef81f9d765 100644
(file)
--- a/
bertos/cpu/cortex-m3/drv/kdebug_sam3.c
+++ b/
bertos/cpu/cortex-m3/drv/kdebug_sam3.c
@@
-38,31
+38,28
@@
#include <cfg/cfg_debug.h>
#include <cfg/macros.h> /* for BV() */
#include <cfg/cfg_debug.h>
#include <cfg/macros.h> /* for BV() */
-#include <io/sam3_ints.h>
-#include <io/sam3_gpio.h>
-#include <io/sam3_pmc.h>
-#include <io/sam3_uart.h>
+#include <io/sam3.h>
#if CONFIG_KDEBUG_PORT == 0
#define UART_BASE UART0_BASE
#if CONFIG_KDEBUG_PORT == 0
#define UART_BASE UART0_BASE
- #define UART_I
NT INT_UART0
- #define UART_
GPIO_BASE GPIO_PORT
A_BASE
- #define UART_PINS (
GPIO_UART0_RX_PIN | GPIO_UART0_TX_PIN
)
+ #define UART_I
D UART0_ID
+ #define UART_
PIO_BASE PIO
A_BASE
+ #define UART_PINS (
BV(RXD0) | BV(TXD0)
)
#elif (CONFIG_KDEBUG_PORT == 1) && !defined(CPU_CM3_AT91SAM3U)
#define UART_BASE UART1_BASE
#elif (CONFIG_KDEBUG_PORT == 1) && !defined(CPU_CM3_AT91SAM3U)
#define UART_BASE UART1_BASE
- #define UART_I
NT INT_UART1
- #define UART_
GPIO_BASE GPIO_PORT
B_BASE
- #define UART_PINS (
GPIO_UART1_RX_PIN | GPIO_UART1_TX_PIN
)
+ #define UART_I
D UART1_ID
+ #define UART_
PIO_BASE PIO
B_BASE
+ #define UART_PINS (
BV(RXD1) | BV(TXD1)
)
#else
#error "UART port not supported in this board"
#endif
// TODO: refactor serial simple functions and use them, see lm3s kdebug
#else
#error "UART port not supported in this board"
#endif
// TODO: refactor serial simple functions and use them, see lm3s kdebug
-#define KDBG_WAIT_READY() while (!(HWREG(UART_BASE + UART_SR
) & UART_SR_TXRDY
)) {}
-#define KDBG_WAIT_TXDONE() while (!(HWREG(UART_BASE + UART_SR
) & UART_SR_TXEMPTY
)) {}
+#define KDBG_WAIT_READY() while (!(HWREG(UART_BASE + UART_SR
_OFF) & BV(UART_SR_TXRDY)
)) {}
+#define KDBG_WAIT_TXDONE() while (!(HWREG(UART_BASE + UART_SR
_OFF) & BV(UART_SR_TXEMPTY)
)) {}
-#define KDBG_WRITE_CHAR(c) do { HWREG(UART_BASE + UART_THR) = (c); } while(0)
+#define KDBG_WRITE_CHAR(c) do { HWREG(UART_BASE + UART_THR
_OFF
) = (c); } while(0)
/* Debug unit is used only for debug purposes so does not generate interrupts. */
#define KDBG_MASK_IRQ(old) do { (void)old; } while(0)
/* Debug unit is used only for debug purposes so does not generate interrupts. */
#define KDBG_MASK_IRQ(old) do { (void)old; } while(0)
@@
-76,22
+73,22
@@
typedef uint32_t kdbg_irqsave_t;
INLINE void kdbg_hw_init(void)
{
/* Disable PIO mode and set appropriate UART pins peripheral mode */
INLINE void kdbg_hw_init(void)
{
/* Disable PIO mode and set appropriate UART pins peripheral mode */
- HWREG(UART_
GPIO_BASE + GPIO_PDR
) = UART_PINS;
- HWREG(UART_
GPIO_BASE + GPIO_ABCDSR1
) &= ~UART_PINS;
- HWREG(UART_
GPIO_BASE + GPIO_ABCDSR2
) &= ~UART_PINS;
+ HWREG(UART_
PIO_BASE + PIO_PDR_OFF
) = UART_PINS;
+ HWREG(UART_
PIO_BASE + PIO_ABCDSR1_OFF
) &= ~UART_PINS;
+ HWREG(UART_
PIO_BASE + PIO_ABCDSR2_OFF
) &= ~UART_PINS;
/* Enable the peripheral clock */
/* Enable the peripheral clock */
- PMC_PCER
_R = UART_INT
;
+ PMC_PCER
= BV(UART_ID)
;
/* Reset and disable receiver & transmitter */
/* Reset and disable receiver & transmitter */
- HWREG(UART_BASE + UART_CR
) = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS
;
+ HWREG(UART_BASE + UART_CR
_OFF) = BV(UART_CR_RSTRX) | BV(UART_CR_RSTTX) | BV(UART_CR_RXDIS) | BV(UART_CR_TXDIS)
;
/* Set mode: normal, no parity */
/* Set mode: normal, no parity */
- HWREG(UART_BASE + UART_MR) = UART_MR_PAR_NO;
+ HWREG(UART_BASE + UART_MR
_OFF
) = UART_MR_PAR_NO;
/* Set baud rate */
/* Set baud rate */
- HWREG(UART_BASE + UART_BRGR) = CPU_FREQ / CONFIG_KDEBUG_BAUDRATE / 16;
+ HWREG(UART_BASE + UART_BRGR
_OFF
) = CPU_FREQ / CONFIG_KDEBUG_BAUDRATE / 16;
/* Enable receiver & transmitter */
/* Enable receiver & transmitter */
- HWREG(UART_BASE + UART_CR
) = UART_CR_RXEN | UART_CR_TXEN
;
+ HWREG(UART_BASE + UART_CR
_OFF) = BV(UART_CR_RXEN) | BV(UART_CR_TXEN)
;
}
}