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STM32: GPIO: use uint16_t for the mask of pins that we want read/write
[bertos.git]
/
bertos
/
cpu
/
cortex-m3
/
drv
/
ser_stm32.c
diff --git
a/bertos/cpu/cortex-m3/drv/ser_stm32.c
b/bertos/cpu/cortex-m3/drv/ser_stm32.c
index a74b7fe0d6d4430ea600880f65c53e1880f7ad0d..eb88e6e6efbc1b33ba6e8d70d378a8a0abac7d9c 100644
(file)
--- a/
bertos/cpu/cortex-m3/drv/ser_stm32.c
+++ b/
bertos/cpu/cortex-m3/drv/ser_stm32.c
@@
-96,6
+96,7
@@
static const struct gpio_uart_info gpio_uart[SER_CNT] =
.sysctl_gpio = RCC_APB2_GPIOA,
.sysctl_usart = RCC_APB1_USART2,
},
.sysctl_gpio = RCC_APB2_GPIOA,
.sysctl_usart = RCC_APB1_USART2,
},
+#if CPU_CM3_STM32F103RB
/* UART3 */
{
.base = GPIOB_BASE,
/* UART3 */
{
.base = GPIOB_BASE,
@@
-104,6
+105,7
@@
static const struct gpio_uart_info gpio_uart[SER_CNT] =
.sysctl_gpio = RCC_APB2_GPIOB,
.sysctl_usart = RCC_APB1_USART3,
},
.sysctl_gpio = RCC_APB2_GPIOB,
.sysctl_usart = RCC_APB1_USART3,
},
+#endif
};
#define USART1_PORT 0
};
#define USART1_PORT 0
@@
-337,7
+339,9
@@
static void stm32_uartIRQDisable(int port)
/* UART port instances */
UART_PORT(1)
UART_PORT(2)
/* UART port instances */
UART_PORT(1)
UART_PORT(2)
+#if CPU_CM3_STM32F103RB
UART_PORT(3)
UART_PORT(3)
+#endif
static struct CM3Serial UARTDesc[SER_CNT] =
{
static struct CM3Serial UARTDesc[SER_CNT] =
{
@@
-365,6
+369,7
@@
static struct CM3Serial UARTDesc[SER_CNT] =
.base = USART2_BASE,
.irq = USART2_IRQHANDLER,
},
.base = USART2_BASE,
.irq = USART2_IRQHANDLER,
},
+#if CPU_CM3_STM32F103RB
{
.hw = {
.table = &USART3_VT,
{
.hw = {
.table = &USART3_VT,
@@
-377,6
+382,7
@@
static struct CM3Serial UARTDesc[SER_CNT] =
.base = USART3_BASE,
.irq = USART3_IRQHANDLER,
},
.base = USART3_BASE,
.irq = USART3_IRQHANDLER,
},
+#endif
};
struct SerialHardware *ser_hw_getdesc(int port)
};
struct SerialHardware *ser_hw_getdesc(int port)